Merge tag 'qcom-arm64-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM64 DT updates for 5.11

For SM8250 the recently introduced support for handling boot-loader
stream mappings in the ARM SMMU allow us to enable this, and thereby USB
controller and PHY, SDHCI controller and FastRPC, as well as support for
the SM8250 HDK board has been added. Additionally PRNG and RTC is
enabled.

Similarly for SM8150, the ARM SMMU could be added which allows the
secondary USB controller and PHYs, as well as WiFi to be added and
support for the SM8150 HDK board to be introduced. Additionally
Coresight and support for the last-level cache controller was added.

MSM8916 finally has VDDCX and VDDMX removed as regulators and are now
handled by the rpmpd driver for the devices controlling them. The
Longsheer L8150 gains touchscreen, sensors, vibrator and LED support.

MSM8992 gains USB and SDHCI support as well as an I2C controller and the
associated RMI4 based touchscreen for the Lumia 950.

MSM8994 also gains USB and SDHCI support, as well as VADC and temp-alarm
support. Then support for the Lumia 950 XL is added.

SDM845 gains interconnect properties for a number of devices and the
GENI wrappers gains iommu stream configuration, which means DMA
operations on e.g. I2C now works. The Lenovo Yoga C630 finally has the
SMMU enabled, a few fixes and the description of the eDP bridge and
panel means that the laptop can now boot mainline with working display,
GPU, WiFi and audio.

SC7180 gains a slew of smaller improvements and fixes.

* tag 'qcom-arm64-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (93 commits)
  arm64: dts: qcom: c630: Define eDP bridge and panel
  arm64: dts: qcom: c630: Fix pinctrl pins properties
  arm64: dts: qcom: c630: Polish i2c-hid devices
  arm64: dts: qcom: sc7180: Add lpass cpu node for I2S driver
  arm64: dts: sdm845: Add interconnect properties for QUP
  interconnect: qcom: sdm845: Add the missing nodes for QUP
  dt-bindings: interconnect: sdm845: Add IDs for the QUP ports
  arm64: dts: qcom: c630: Expose LID events
  arm64: dts: qcom: c630: Re-enable apps_smmu
  dts: qcom: sdm845: Add dt entries to support crypto engine.
  arm64: dts: qcom: qrb5165-rb5: Add support for MCP2518FD
  arm64: dts: qcom: sdm845: use GIC_SPI for IPA interrupts
  arm64: dts: qcom: sc7180: use GIC_SPI for IPA interrupts
  arm64: dts: qcom: sc7180: limit IPA iommu streams
  arm64: dts: qcom: sm8150: Add Coresight support
  arm64: dts: qcom: sc7180-trogdor: Make pp3300_a the default supply for pp3300_hub
  arm64: dts: qcom: sc7180: Add DDR/L3 votes for the pro variant
  arm64: dts: qcom: sc7180-lite: Tweak DDR/L3 scaling on SC7180-lite
  arm64: dts: qcom: sc7180-trogdor: add "pen-insert" label for trogdor
  arm64: qcom: sc7180: trogdor: Add ADC nodes and thermal zone for charger thermistor
  ...

Link: https://lore.kernel.org/r/20201130190131.345187-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

1 files changed, 3 insertions, 0 deletions

diff --git a/drivers/interconnect/qcom/sdm845.c b/drivers/interconnect/qcom/sdm845.c
index 5304aea3b058..366870150cbd 100644
--- a/drivers/interconnect/qcom/sdm845.c
+++ b/drivers/interconnect/qcom/sdm845.c
@@ -177,6 +177,7 @@ DEFINE_QBCM(bcm_sn15, "SN15", false, &qnm_memnoc);
 
 static struct qcom_icc_bcm *aggre1_noc_bcms[] = {
 	&bcm_sn9,
+	&bcm_qup0,
 };
 
 static struct qcom_icc_node *aggre1_noc_nodes[] = {
@@ -190,6 +191,7 @@ static struct qcom_icc_node *aggre1_noc_nodes[] = {
 	[SLAVE_A1NOC_SNOC] = &qns_a1noc_snoc,
 	[SLAVE_SERVICE_A1NOC] = &srvc_aggre1_noc,
 	[SLAVE_ANOC_PCIE_A1NOC_SNOC] = &qns_pcie_a1noc_snoc,
+	[MASTER_QUP_1] = &qhm_qup1,
 };
 
 static const struct qcom_icc_desc sdm845_aggre1_noc = {
@@ -218,6 +220,7 @@ static struct qcom_icc_node *aggre2_noc_nodes[] = {
 	[SLAVE_A2NOC_SNOC] = &qns_a2noc_snoc,
 	[SLAVE_ANOC_PCIE_SNOC] = &qns_pcie_snoc,
 	[SLAVE_SERVICE_A2NOC] = &srvc_aggre2_noc,
+	[MASTER_QUP_2] = &qhm_qup2,
 };
 
 static const struct qcom_icc_desc sdm845_aggre2_noc = {