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authorRobin Murphy <robin.murphy@arm.com>2019-08-15 20:37:21 +0200
committerWill Deacon <will@kernel.org>2019-08-19 17:52:47 +0200
commit353b325047fdfd437dc2afaee89fc66de3657b7e (patch)
tree30d820a50b1d9fc9eb6b45910434b53097b2089b /drivers/iommu/arm-smmu.c
parentLinus 5.3-rc1 (diff)
downloadlinux-353b325047fdfd437dc2afaee89fc66de3657b7e.tar.xz
linux-353b325047fdfd437dc2afaee89fc66de3657b7e.zip
iommu/arm-smmu: Mask TLBI address correctly
The less said about "~12UL" the better. Oh dear. We get away with it due to calling constraints that mean IOVAs are implicitly at least page-aligned to begin with, but still; oh dear. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'drivers/iommu/arm-smmu.c')
-rw-r--r--drivers/iommu/arm-smmu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 64977c131ee6..d60ee292ecee 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -504,7 +504,7 @@ static void arm_smmu_tlb_inv_range_nosync(unsigned long iova, size_t size,
reg += leaf ? ARM_SMMU_CB_S1_TLBIVAL : ARM_SMMU_CB_S1_TLBIVA;
if (cfg->fmt != ARM_SMMU_CTX_FMT_AARCH64) {
- iova &= ~12UL;
+ iova = (iova >> 12) << 12;
iova |= cfg->asid;
do {
writel_relaxed(iova, reg);