diff options
| author | Paul Burton <paul.burton@imgtec.com> | 2017-08-13 06:36:16 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2017-09-04 13:53:14 +0200 |
| commit | e98fcb2a8cc003c37c24713d2303667a8f624a30 (patch) | |
| tree | 0ff2e2474c53a085e1359c2442cb348cef7601d2 /drivers/irqchip/irq-mips-gic.c | |
| parent | MIPS: Add __ioread64_copy (diff) | |
| download | linux-e98fcb2a8cc003c37c24713d2303667a8f624a30.tar.xz linux-e98fcb2a8cc003c37c24713d2303667a8f624a30.zip | |
irqchip: mips-gic: Simplify shared interrupt pending/mask reads
Simplify the reads of the bitmaps indicating pending & masked interrupts
in gic_handle_shared_int() using the __ioread32_copy() &
__ioread64_copy() helper functions.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17026/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'drivers/irqchip/irq-mips-gic.c')
| -rw-r--r-- | drivers/irqchip/irq-mips-gic.c | 29 |
1 files changed, 11 insertions, 18 deletions
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c index 5193e6cf87ab..7445c3b58c44 100644 --- a/drivers/irqchip/irq-mips-gic.c +++ b/drivers/irqchip/irq-mips-gic.c @@ -225,31 +225,24 @@ int gic_get_usm_range(struct resource *gic_usm_res) static void gic_handle_shared_int(bool chained) { - unsigned int i, intr, virq, gic_reg_step = mips_cm_is64 ? 8 : 4; + unsigned int intr, virq; unsigned long *pcpu_mask; - unsigned long pending_reg, intrmask_reg; DECLARE_BITMAP(pending, GIC_MAX_INTRS); DECLARE_BITMAP(intrmask, GIC_MAX_INTRS); /* Get per-cpu bitmaps */ pcpu_mask = pcpu_masks[smp_processor_id()].pcpu_mask; - pending_reg = GIC_REG(SHARED, GIC_SH_PEND); - intrmask_reg = GIC_REG(SHARED, GIC_SH_MASK); - - for (i = 0; i < BITS_TO_LONGS(gic_shared_intrs); i++) { - pending[i] = gic_read(pending_reg); - intrmask[i] = gic_read(intrmask_reg); - pending_reg += gic_reg_step; - intrmask_reg += gic_reg_step; - - if (!IS_ENABLED(CONFIG_64BIT) || mips_cm_is64) - continue; - - pending[i] |= (u64)gic_read(pending_reg) << 32; - intrmask[i] |= (u64)gic_read(intrmask_reg) << 32; - pending_reg += gic_reg_step; - intrmask_reg += gic_reg_step; + if (mips_cm_is64) { + __ioread64_copy(pending, addr_gic_pend(), + DIV_ROUND_UP(gic_shared_intrs, 64)); + __ioread64_copy(intrmask, addr_gic_mask(), + DIV_ROUND_UP(gic_shared_intrs, 64)); + } else { + __ioread32_copy(pending, addr_gic_pend(), + DIV_ROUND_UP(gic_shared_intrs, 32)); + __ioread32_copy(intrmask, addr_gic_mask(), + DIV_ROUND_UP(gic_shared_intrs, 32)); } bitmap_and(pending, pending, intrmask, gic_shared_intrs); |