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authorShenwei Wang <shenwei.wang@nxp.com>2022-07-14 20:58:58 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2022-07-28 10:34:04 +0200
commit070298c84e5b924c688a4d08c3a9193175cdffd8 (patch)
treedec9c09bf7578e767612f4ad527c331e774b490c /drivers/leds
parenttty: serial: qcom-geni-serial: Fix get_clk_div_rate() which otherwise could r... (diff)
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serial: fsl_lpuart: zero out parity bit in CS7 mode
The LPUART hardware doesn't zero out the parity bit on the received characters. This behavior won't impact the use cases of CS8 because the parity bit is the 9th bit which is not currently used by software. But the parity bit for CS7 must be zeroed out by software in order to get the correct raw data. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Link: https://lore.kernel.org/r/20220714185858.615373-1-shenwei.wang@nxp.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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