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authorAnson Huang <anson.huang@nxp.com>2019-02-12 13:40:25 +0100
committerJassi Brar <jaswinder.singh@linaro.org>2019-03-11 08:51:43 +0100
commit17b860bbfc844a3d8e38135ef430d4af8e436b9e (patch)
tree55ff034597253959b7e0ce190db55bb7d93fc1f6 /drivers/mailbox
parentdt-bindings: mailbox: Add Xilinx IPI Mailbox (diff)
downloadlinux-17b860bbfc844a3d8e38135ef430d4af8e436b9e.tar.xz
linux-17b860bbfc844a3d8e38135ef430d4af8e436b9e.zip
mailbox: imx: keep MU irq working during suspend/resume
During noirq suspend phase, mailbox MU irq will be masked but many drivers still need to communicate with system controller firmware via mailbox, if MU irq is masked, it will cause RPC timeout as below: [ 23.372103] imx-scu scu: RPC send msg timeout Setting MU irq to be wakeup source is NOT working as GIC driver does NOT have .irq_set_wake implemented, so to support suspend/resume, just make imx mailbox driver NOT suspend, since MU is always a wakeup source on i.MX platforms with system controller inside, and its power/clock is maintained by system controller, mailbox driver no need to manage them. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Diffstat (limited to 'drivers/mailbox')
-rw-r--r--drivers/mailbox/imx-mailbox.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mailbox/imx-mailbox.c b/drivers/mailbox/imx-mailbox.c
index 774362a05159..85fc5b56f99b 100644
--- a/drivers/mailbox/imx-mailbox.c
+++ b/drivers/mailbox/imx-mailbox.c
@@ -187,8 +187,8 @@ static int imx_mu_startup(struct mbox_chan *chan)
return 0;
}
- ret = request_irq(priv->irq, imx_mu_isr, IRQF_SHARED, cp->irq_desc,
- chan);
+ ret = request_irq(priv->irq, imx_mu_isr, IRQF_SHARED |
+ IRQF_NO_SUSPEND, cp->irq_desc, chan);
if (ret) {
dev_err(priv->dev,
"Unable to acquire IRQ %d\n", priv->irq);