summaryrefslogtreecommitdiffstats
path: root/drivers/media/i2c/ar0521.c
diff options
context:
space:
mode:
authorJacopo Mondi <jacopo@jmondi.org>2022-11-21 18:48:33 +0100
committerMauro Carvalho Chehab <mchehab@kernel.org>2022-11-25 09:46:29 +0100
commitec2289616bcba750e33a0eadb8f65a365a1901d5 (patch)
treeafe52ec5a0d158f28de9762746a4cfadf816bc52 /drivers/media/i2c/ar0521.c
parentmedia: ar0521: Rework startup sequence (diff)
downloadlinux-ec2289616bcba750e33a0eadb8f65a365a1901d5.tar.xz
linux-ec2289616bcba750e33a0eadb8f65a365a1901d5.zip
media: ar0521: Tab-align definitions
Align some register and constant definitions using tab in place of mixed tab+spaces. Cosmetic change only. Signed-off-by: Jacopo Mondi <jacopo@jmondi.org> Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
Diffstat (limited to 'drivers/media/i2c/ar0521.c')
-rw-r--r--drivers/media/i2c/ar0521.c30
1 files changed, 15 insertions, 15 deletions
diff --git a/drivers/media/i2c/ar0521.c b/drivers/media/i2c/ar0521.c
index 91fa4cba12f6..77f597571167 100644
--- a/drivers/media/i2c/ar0521.c
+++ b/drivers/media/i2c/ar0521.c
@@ -14,17 +14,17 @@
#include <media/v4l2-subdev.h>
/* External clock (extclk) frequencies */
-#define AR0521_EXTCLK_MIN (10 * 1000 * 1000)
-#define AR0521_EXTCLK_MAX (48 * 1000 * 1000)
+#define AR0521_EXTCLK_MIN (10 * 1000 * 1000)
+#define AR0521_EXTCLK_MAX (48 * 1000 * 1000)
/* PLL and PLL2 */
-#define AR0521_PLL_MIN (320 * 1000 * 1000)
-#define AR0521_PLL_MAX (1280 * 1000 * 1000)
+#define AR0521_PLL_MIN (320 * 1000 * 1000)
+#define AR0521_PLL_MAX (1280 * 1000 * 1000)
/* Effective pixel sample rate on the pixel array. */
-#define AR0521_PIXEL_CLOCK_RATE (184 * 1000 * 1000)
-#define AR0521_PIXEL_CLOCK_MIN (168 * 1000 * 1000)
-#define AR0521_PIXEL_CLOCK_MAX (414 * 1000 * 1000)
+#define AR0521_PIXEL_CLOCK_RATE (184 * 1000 * 1000)
+#define AR0521_PIXEL_CLOCK_MIN (168 * 1000 * 1000)
+#define AR0521_PIXEL_CLOCK_MAX (414 * 1000 * 1000)
#define AR0521_NATIVE_WIDTH 2604u
#define AR0521_NATIVE_HEIGHT 1964u
@@ -33,15 +33,15 @@
#define AR0521_MAX_X_ADDR_END 2603u
#define AR0521_MAX_Y_ADDR_END 1955u
-#define AR0521_WIDTH_MIN 8u
-#define AR0521_WIDTH_MAX 2592u
-#define AR0521_HEIGHT_MIN 8u
-#define AR0521_HEIGHT_MAX 1944u
+#define AR0521_WIDTH_MIN 8u
+#define AR0521_WIDTH_MAX 2592u
+#define AR0521_HEIGHT_MIN 8u
+#define AR0521_HEIGHT_MAX 1944u
-#define AR0521_WIDTH_BLANKING_MIN 572u
-#define AR0521_HEIGHT_BLANKING_MIN 38u /* must be even */
-#define AR0521_TOTAL_HEIGHT_MAX 65535u /* max_frame_length_lines */
-#define AR0521_TOTAL_WIDTH_MAX 65532u /* max_line_length_pck */
+#define AR0521_WIDTH_BLANKING_MIN 572u
+#define AR0521_HEIGHT_BLANKING_MIN 38u /* must be even */
+#define AR0521_TOTAL_HEIGHT_MAX 65535u /* max_frame_length_lines */
+#define AR0521_TOTAL_WIDTH_MAX 65532u /* max_line_length_pck */
#define AR0521_ANA_GAIN_MIN 0x00
#define AR0521_ANA_GAIN_MAX 0x3f