Merge tag 'nand/for-6.6' into mtd/next

Raw NAND core changes:
* Fix -Wvoid-pointer-to-enum-cast warning
* Export 'nand_exit_status_op()'
* dt-bindings: Fix nand-controller.yaml license

Raw NAND controller driver changes:
* Omap, Omap2, Samsung, Atmel, fsl_upm, lpc32xx_slc, lpc32xx_mlc, STM32_FMC2,
  sh_ftlctl, MXC, Sunxi:
  - Use devm_platform_get_and_ioremap_resource()
* Orion, vf610_nfc, Sunxi, STM32_FMC2, MTK, mpc5121, lpc32xx_slc, Intel,
  FSMC, Arasan:
  - Use helper function devm_clk_get_optional_enabled()
* Brcmnand:
  - Use devm_platform_ioremap_resource_byname()
  - Propagate init error -EPROBE_DEFER up
  - Propagate error and simplify ternary operators
  - Fix mtd oobsize
  - Fix potential out-of-bounds access in oob write
  - Fix crash during the panic_write
  - Fix potential false time out warning
  - Fix ECC level field setting for v7.2 controller
* fsmc: Handle clk prepare error in fsmc_nand_resume()
* Marvell: Add support for AC5 SoC
* Meson:
  - Support for 512B ECC step size
  - Fix build error
  - Use NAND core API to check status
  - dt-bindings:
    * Make ECC properties dependent
    * Support for 512B ECC step size
    * Drop unneeded quotes
* Oxnas: Remove driver and bindings
* Qcom:
  - Conversion to ->exec_op()
  - Removal of the legacy interface
  - Two full series of improvements/misc fixes
    * Use the BIT() macro
    * Use u8 instead of uint8_t
    * Fix alignment with open parenthesis
    * Fix the spacing
    * Fix wrong indentation
    * Fix a typo
    * Early structure initialization
    * Fix address parsing within ->exec_op()
    * Remove superfluous initialization of "ret"
    * Rename variables in qcom_op_cmd_mapping()
    * Handle unsupported opcode in qcom_op_cmd_mapping()
    * Fix the opcode check in qcom_check_op()
    * Use EOPNOTSUPP instead of ENOTSUPP
    * Wrap qcom_nand_exec_op() to 80 columns
    * Unmap sg_list and free desc within submic_descs()
    * Simplify the call to nand_prog_page_end_op()
    * Do not override the error no of submit_descs()
    * Sort includes alphabetically
    * Clear buf_count and buf_start in raw read
    * Add read/read_start ops in exec_op path
* vf610_nfc: Do not check 0 for platform_get_irq()

SPI-NAND changes:
* gigadevice: Add support for GD5F1GQ{4,5}RExxH
* esmt: Add support for F50D2G41KA
* toshiba: Add support for T{C,H}58NYG{0,2}S3HBAI4 and TH58NYG3S0HBAI6

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

1 files changed, 2 insertions, 9 deletions

diff --git a/drivers/mtd/nand/raw/mpc5121_nfc.c b/drivers/mtd/nand/raw/mpc5121_nfc.c
index 6e8e790f84e7..215610f808f1 100644
--- a/drivers/mtd/nand/raw/mpc5121_nfc.c
+++ b/drivers/mtd/nand/raw/mpc5121_nfc.c
@@ -595,8 +595,6 @@ static void mpc5121_nfc_free(struct device *dev, struct mtd_info *mtd)
 	struct nand_chip *chip = mtd_to_nand(mtd);
 	struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
 
-	clk_disable_unprepare(prv->clk);
-
 	if (prv->csreg)
 		iounmap(prv->csreg);
 }
@@ -717,17 +715,12 @@ static int mpc5121_nfc_probe(struct platform_device *op)
 	}
 
 	/* Enable NFC clock */
-	clk = devm_clk_get(dev, "ipg");
+	clk = devm_clk_get_enabled(dev, "ipg");
 	if (IS_ERR(clk)) {
-		dev_err(dev, "Unable to acquire NFC clock!\n");
+		dev_err(dev, "Unable to acquire and enable NFC clock!\n");
 		retval = PTR_ERR(clk);
 		goto error;
 	}
-	retval = clk_prepare_enable(clk);
-	if (retval) {
-		dev_err(dev, "Unable to enable NFC clock!\n");
-		goto error;
-	}
 	prv->clk = clk;
 
 	/* Reset NAND Flash controller */