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author | Miquel Raynal <miquel.raynal@bootlin.com> | 2021-05-05 23:37:37 +0200 |
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committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2021-05-26 10:43:46 +0200 |
commit | 9310668fb60a7ee76c4fdfd6388747a6f2beaf75 (patch) | |
tree | 280477dc30cacd61f8ee85001054f26a334e74a3 /drivers/mtd/nand/raw/nand_onfi.c | |
parent | mtd: rawnand: Add NV-DDR timings (diff) | |
download | linux-9310668fb60a7ee76c4fdfd6388747a6f2beaf75.tar.xz linux-9310668fb60a7ee76c4fdfd6388747a6f2beaf75.zip |
mtd: rawnand: Retrieve NV-DDR timing modes from the ONFI parameter page
When parsing the ONFI parameter page, save the available NV-DDR timing
modes in the core's dynamic ONFI structure. Once available to the rest
of the core out of the ONFI driver, these values will then be used to
derive the best timing mode.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210505213750.257417-10-miquel.raynal@bootlin.com
Diffstat (limited to 'drivers/mtd/nand/raw/nand_onfi.c')
-rw-r--r-- | drivers/mtd/nand/raw/nand_onfi.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/mtd/nand/raw/nand_onfi.c b/drivers/mtd/nand/raw/nand_onfi.c index 02303455c34f..f7a4a0573fe7 100644 --- a/drivers/mtd/nand/raw/nand_onfi.c +++ b/drivers/mtd/nand/raw/nand_onfi.c @@ -316,6 +316,8 @@ int nand_onfi_detect(struct nand_chip *chip) onfi->tR = le16_to_cpu(p->t_r); onfi->tCCS = le16_to_cpu(p->t_ccs); onfi->sdr_timing_modes = le16_to_cpu(p->sdr_timing_modes); + if (p->features & ONFI_FEATURE_NV_DDR) + onfi->nvddr_timing_modes = p->nvddr_timing_modes; onfi->vendor_revision = le16_to_cpu(p->vendor_revision); memcpy(onfi->vendor, p->vendor, sizeof(p->vendor)); chip->parameters.onfi = onfi; |