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authorMiquel Raynal <miquel.raynal@bootlin.com>2020-08-27 10:51:58 +0200
committerMiquel Raynal <miquel.raynal@bootlin.com>2020-09-28 15:59:42 +0200
commitbace41f80f65dc4ba13c892bac783e7e81847379 (patch)
tree16b44ea42a23ec7ce4b826e54b7626576e98dfb0 /drivers/mtd/nand/raw/nandsim.c
parentmtd: rawnand: Separate the ECC engine type and the ECC byte placement (diff)
downloadlinux-bace41f80f65dc4ba13c892bac783e7e81847379.tar.xz
linux-bace41f80f65dc4ba13c892bac783e7e81847379.zip
mtd: rawnand: Use the new ECC engine type enumeration
Mechanical switch from the legacy "mode" enumeration to the new "engine type" enumeration in drivers and board files. The device tree parsing is also updated to return the new enumeration from the old strings. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-11-miquel.raynal@bootlin.com
Diffstat (limited to 'drivers/mtd/nand/raw/nandsim.c')
-rw-r--r--drivers/mtd/nand/raw/nandsim.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mtd/nand/raw/nandsim.c b/drivers/mtd/nand/raw/nandsim.c
index 1ab849ccaa96..a8048cb8d220 100644
--- a/drivers/mtd/nand/raw/nandsim.c
+++ b/drivers/mtd/nand/raw/nandsim.c
@@ -2234,7 +2234,7 @@ static int ns_attach_chip(struct nand_chip *chip)
return -EINVAL;
}
- chip->ecc.mode = NAND_ECC_SOFT;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
chip->ecc.algo = NAND_ECC_ALGO_BCH;
chip->ecc.size = 512;
chip->ecc.strength = bch;
@@ -2274,7 +2274,7 @@ static int __init ns_init_module(void)
nsmtd = nand_to_mtd(chip);
nand_set_controller_data(chip, (void *)ns);
- chip->ecc.mode = NAND_ECC_SOFT;
+ chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
/* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */
/* and 'badblocks' parameters to work */