diff options
| author | Andrew Lunn <andrew@lunn.ch> | 2018-11-10 23:43:33 +0100 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2018-11-11 19:10:01 +0100 |
| commit | 3c1bcc8614db10803f1f57ef0295363917448cb2 (patch) | |
| tree | 431ae141dae05b86ff2e3f39406436c1d9721a63 /drivers/net/ethernet/cavium | |
| parent | net: phy: remove states PHY_STARTING and PHY_PENDING (diff) | |
| download | linux-3c1bcc8614db10803f1f57ef0295363917448cb2.tar.xz linux-3c1bcc8614db10803f1f57ef0295363917448cb2.zip | |
net: ethernet: Convert phydev advertize and supported from u32 to link mode
There are a few MAC/PHYs combinations which now support > 1Gbps. These
may need to make use of link modes with bits > 31. Thus their
supported PHY features or advertised features cannot be implemented
using the current bitmap in a u32. Convert to using a linkmode bitmap,
which can support all the currently devices link modes, and is future
proof as more modes are added.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/cavium')
| -rw-r--r-- | drivers/net/ethernet/cavium/octeon/octeon_mgmt.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/net/ethernet/cavium/octeon/octeon_mgmt.c b/drivers/net/ethernet/cavium/octeon/octeon_mgmt.c index 4b3aecf98f2a..5359c1021f42 100644 --- a/drivers/net/ethernet/cavium/octeon/octeon_mgmt.c +++ b/drivers/net/ethernet/cavium/octeon/octeon_mgmt.c @@ -1080,8 +1080,11 @@ static int octeon_mgmt_open(struct net_device *netdev) /* Set the mode of the interface, RGMII/MII. */ if (OCTEON_IS_MODEL(OCTEON_CN6XXX) && netdev->phydev) { union cvmx_agl_prtx_ctl agl_prtx_ctl; - int rgmii_mode = (netdev->phydev->supported & - (SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full)) != 0; + int rgmii_mode = + (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, + netdev->phydev->supported) | + linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, + netdev->phydev->supported)) != 0; agl_prtx_ctl.u64 = cvmx_read_csr(p->agl_prt_ctl); agl_prtx_ctl.s.mode = rgmii_mode ? 0 : 1; |