diff options
author | Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> | 2019-11-20 01:16:08 +0100 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2019-11-20 21:05:23 +0100 |
commit | 21c4c60b7696346c48ed11478f4bffec6d1b2dcb (patch) | |
tree | 213d48d7dc4fe408556bc9b688795defb343ed66 /drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_matchall.h | |
parent | cxgb4: check rule prio conflicts before offload (diff) | |
download | linux-21c4c60b7696346c48ed11478f4bffec6d1b2dcb.tar.xz linux-21c4c60b7696346c48ed11478f4bffec6d1b2dcb.zip |
cxgb4: add TC-MATCHALL classifier ingress offload
Add TC-MATCHALL classifier ingress offload support. The same actions
supported by existing TC-FLOWER offload can be applied to all incoming
traffic on the underlying interface.
Ensure the rule priority doesn't conflict with existing rules in the
TCAM. Only 1 ingress matchall rule can be active at a time on the
underlying interface.
v5:
- No change.
v4:
- Added check to ensure the matchall rule's prio doesn't conflict with
other rules in TCAM.
- Added logic to fill default mask for VIID, if none has been
provided, to prevent conflict with duplicate VIID rules.
- Used existing variables in private structure to fill VIID info,
instead of extracting the info manually.
v3:
- No change.
v2:
- Removed logic to fetch free index from end of TCAM. Must maintain
same ordering as in kernel.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_matchall.h')
-rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_matchall.h | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_matchall.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_matchall.h index ce5b0800f0d8..ab6b5683dfd3 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_matchall.h +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_matchall.h @@ -17,8 +17,18 @@ struct cxgb4_matchall_egress_entry { u64 cookie; /* Used to identify the MATCHALL rule offloaded */ }; +struct cxgb4_matchall_ingress_entry { + enum cxgb4_matchall_state state; /* Current MATCHALL offload state */ + u32 tid; /* Index to hardware filter entry */ + struct ch_filter_specification fs; /* Filter entry */ + u64 bytes; /* # of bytes hitting the filter */ + u64 packets; /* # of packets hitting the filter */ + u64 last_used; /* Last updated jiffies time */ +}; + struct cxgb4_tc_port_matchall { struct cxgb4_matchall_egress_entry egress; /* Egress offload info */ + struct cxgb4_matchall_ingress_entry ingress; /* Ingress offload info */ }; struct cxgb4_tc_matchall { @@ -26,9 +36,13 @@ struct cxgb4_tc_matchall { }; int cxgb4_tc_matchall_replace(struct net_device *dev, - struct tc_cls_matchall_offload *cls_matchall); + struct tc_cls_matchall_offload *cls_matchall, + bool ingress); int cxgb4_tc_matchall_destroy(struct net_device *dev, - struct tc_cls_matchall_offload *cls_matchall); + struct tc_cls_matchall_offload *cls_matchall, + bool ingress); +int cxgb4_tc_matchall_stats(struct net_device *dev, + struct tc_cls_matchall_offload *cls_matchall); int cxgb4_init_tc_matchall(struct adapter *adap); void cxgb4_cleanup_tc_matchall(struct adapter *adap); |