diff options
| author | Anjali Singhai Jain <anjali.singhai@intel.com> | 2014-02-11 09:24:11 +0100 |
|---|---|---|
| committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2014-03-15 00:29:15 +0100 |
| commit | 77e29bc6fc814a2283c9dda07d24f2efb53d585c (patch) | |
| tree | 3909b95a75469821c1b344e271f940fcadb595ba /drivers/net/ethernet/intel/i40evf | |
| parent | i40e: Fix a bug in the update logic for FDIR SB filter. (diff) | |
| download | linux-77e29bc6fc814a2283c9dda07d24f2efb53d585c.tar.xz linux-77e29bc6fc814a2283c9dda07d24f2efb53d585c.zip | |
i40e/i40evf: Some flow director HW definition fixes
1) Fix a name of the error bit to correctly indicate the error.
2) Added a fd_id field in the 32 byte desc at the place(qw0) where it gets
reported in the programming error desc WB. In a normal data desc
the fd_id field is reported in qw3.
Change-ID: Ide9a24bff7273da5889c36635d629bc3b5212010
Signed-off-by: Anjali Singhai Jain <anjali.singhai@intel.com>
Acked-by: Shannon Nelson <shannon.nelson@intel.com>
Signed-off-by: Kevin Scott <kevin.c.scott@intel.com>
Signed-off-by: Catherine Sullivan <catherine.sullivan@intel.com>
Tested-by: Kavindya Deegala <kavindya.s.deegala@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/i40evf')
| -rw-r--r-- | drivers/net/ethernet/intel/i40evf/i40e_type.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/net/ethernet/intel/i40evf/i40e_type.h b/drivers/net/ethernet/intel/i40evf/i40e_type.h index 092aace2a76c..7189d6f08ddd 100644 --- a/drivers/net/ethernet/intel/i40evf/i40e_type.h +++ b/drivers/net/ethernet/intel/i40evf/i40e_type.h @@ -464,6 +464,10 @@ union i40e_32byte_rx_desc { union { __le32 rss; /* RSS Hash */ __le32 fcoe_param; /* FCoE DDP Context id */ + /* Flow director filter id in case of + * Programming status desc WB + */ + __le32 fd_id; } hi_dword; } qword0; struct { @@ -704,7 +708,7 @@ enum i40e_rx_prog_status_desc_prog_id_masks { enum i40e_rx_prog_status_desc_error_bits { /* Note: These are predefined bit offsets */ I40E_RX_PROG_STATUS_DESC_FD_TBL_FULL_SHIFT = 0, - I40E_RX_PROG_STATUS_DESC_NO_FD_QUOTA_SHIFT = 1, + I40E_RX_PROG_STATUS_DESC_NO_FD_ENTRY_SHIFT = 1, I40E_RX_PROG_STATUS_DESC_FCOE_TBL_FULL_SHIFT = 2, I40E_RX_PROG_STATUS_DESC_FCOE_CONFLICT_SHIFT = 3 }; |