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authorSujith Manoharan <c_manoha@qca.qualcomm.com>2015-03-09 09:50:08 +0100
committerKalle Valo <kvalo@codeaurora.org>2015-03-13 14:19:32 +0100
commit656cd75c387383fe3a63e21204107abf5515ecfc (patch)
treeca9356beb6c45d35f59d62d888a9180235dd35c3 /drivers/net/wireless/ath/ath9k/hw.h
parentath9k: Fix PLL powersave for AR9485 (diff)
downloadlinux-656cd75c387383fe3a63e21204107abf5515ecfc.tar.xz
linux-656cd75c387383fe3a63e21204107abf5515ecfc.zip
ath9k: Initialize pll_pwrsave for AR9462/AR9565
Cards based on AR9462/AR9565 support more PCIE power save mechanisms, so register them correctly. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/hw.h')
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index e124ee240dc8..2067cb523ca8 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -341,7 +341,7 @@ struct ath9k_ops_config {
u32 ant_ctrl_comm2g_switch_enable;
bool xatten_margin_cfg;
bool alt_mingainidx;
- bool pll_pwrsave;
+ u8 pll_pwrsave;
bool tx_gain_buffalo;
bool led_active_high;
};