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author | Matti Gottlieb <matti.gottlieb@intel.com> | 2021-12-10 08:06:14 +0100 |
---|---|---|
committer | Luca Coelho <luciano.coelho@intel.com> | 2021-12-21 11:35:04 +0100 |
commit | f1c0bb74b38fbb53d7590a579a464a3dc59f249c (patch) | |
tree | 752ca3d63ffb21c05af2ca9d90782c0c002f7cbf /drivers/net/wireless/intel/iwlwifi/iwl-prph.h | |
parent | iwlwifi: pcie: add jacket bit to device configuration parsing (diff) | |
download | linux-f1c0bb74b38fbb53d7590a579a464a3dc59f249c.tar.xz linux-f1c0bb74b38fbb53d7590a579a464a3dc59f249c.zip |
iwlwifi: Read the correct addresses when getting the crf id
The original implementation checked the HW family, and as a result
of that used different addresses for the prph registers.
The old HWs addresses start with 0xa****** and the newer
ones start with 0xd******.
For this there are iwl_read/write_umac_prph functions that just add the
diff in the address automatically (in this case 0x300000), so the code will
be common for all HWs
In the original implementation the address given already had the 0xd******
causing the address to become 0x10***** (after adding the offset)
Change the registers to start with 0xa*****.
Signed-off-by: Matti Gottlieb <matti.gottlieb@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
Link: https://lore.kernel.org/r/iwlwifi.20211210090244.db2722547eb2.I03dce63698befc2fd9105111c3015b8d6e36868a@changeid
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
Diffstat (limited to 'drivers/net/wireless/intel/iwlwifi/iwl-prph.h')
-rw-r--r-- | drivers/net/wireless/intel/iwlwifi/iwl-prph.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-prph.h b/drivers/net/wireless/intel/iwlwifi/iwl-prph.h index 2ca22e1b8bd9..95b3dae7b504 100644 --- a/drivers/net/wireless/intel/iwlwifi/iwl-prph.h +++ b/drivers/net/wireless/intel/iwlwifi/iwl-prph.h @@ -347,9 +347,7 @@ #define RADIO_REG_SYS_MANUAL_DFT_0 0xAD4078 #define RFIC_REG_RD 0xAD0470 #define WFPM_CTRL_REG 0xA03030 -#define WFPM_CTRL_REG_GEN2 0xd03030 #define WFPM_OTP_CFG1_ADDR 0x00a03098 -#define WFPM_OTP_CFG1_ADDR_GEN2 0x00d03098 #define WFPM_OTP_CFG1_IS_JACKET_BIT BIT(4) #define WFPM_OTP_CFG1_IS_CDB_BIT BIT(5) |