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authorLorenzo Bianconi <lorenzo@kernel.org>2019-12-08 08:25:40 +0100
committerFelix Fietkau <nbd@nbd.name>2020-02-14 10:06:01 +0100
commit183d1fcf0b6a8542fcd4be3074b1dee50bd3b760 (patch)
treecb38d78f696b93c1710e76ab48fa5ebe13b9e412 /drivers/net/wireless/mediatek/mt76/mt7615/regs.h
parentmt76: mt7603: set 0 as min coverage_class value (diff)
downloadlinux-183d1fcf0b6a8542fcd4be3074b1dee50bd3b760.tar.xz
linux-183d1fcf0b6a8542fcd4be3074b1dee50bd3b760.zip
mt76: mt7615: add set_coverage class support
Add the capability to configure acktimeout for mt7615 driver. Moreover configure slottime according to the value provided by mac80211 Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'drivers/net/wireless/mediatek/mt76/mt7615/regs.h')
-rw-r--r--drivers/net/wireless/mediatek/mt76/mt7615/regs.h21
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/regs.h b/drivers/net/wireless/mediatek/mt76/mt7615/regs.h
index cece061b1108..26d121646787 100644
--- a/drivers/net/wireless/mediatek/mt76/mt7615/regs.h
+++ b/drivers/net/wireless/mediatek/mt76/mt7615/regs.h
@@ -162,14 +162,35 @@
#define MT_AGG_SCR MT_WF_AGG(0x0fc)
#define MT_AGG_SCR_NLNAV_MID_PTEC_DIS BIT(3)
+#define MT_WF_ARB_BASE 0x20c00
+#define MT_WF_ARB(ofs) (MT_WF_ARB_BASE + (ofs))
+
+#define MT_ARB_SCR MT_WF_ARB(0x080)
+#define MT_ARB_SCR_TX0_DISABLE BIT(8)
+#define MT_ARB_SCR_RX0_DISABLE BIT(9)
+#define MT_ARB_SCR_TX1_DISABLE BIT(10)
+#define MT_ARB_SCR_RX1_DISABLE BIT(11)
+
#define MT_WF_TMAC_BASE 0x21000
#define MT_WF_TMAC(ofs) (MT_WF_TMAC_BASE + (ofs))
+#define MT_TMAC_CDTR MT_WF_TMAC(0x090)
+#define MT_TMAC_ODTR MT_WF_TMAC(0x094)
+#define MT_TIMEOUT_VAL_PLCP GENMASK(15, 0)
+#define MT_TIMEOUT_VAL_CCA GENMASK(31, 16)
+
#define MT_TMAC_TRCR0 MT_WF_TMAC(0x09c)
#define MT_TMAC_TRCR1 MT_WF_TMAC(0x070)
#define MT_TMAC_TRCR_CCA_SEL GENMASK(31, 30)
#define MT_TMAC_TRCR_SEC_CCA_SEL GENMASK(29, 28)
+#define MT_TMAC_ICR0 MT_WF_TMAC(0x0a4)
+#define MT_TMAC_ICR1 MT_WF_TMAC(0x074)
+#define MT_IFS_EIFS GENMASK(8, 0)
+#define MT_IFS_RIFS GENMASK(14, 10)
+#define MT_IFS_SIFS GENMASK(22, 16)
+#define MT_IFS_SLOT GENMASK(30, 24)
+
#define MT_TMAC_CTCR0 MT_WF_TMAC(0x0f4)
#define MT_TMAC_CTCR0_INS_DDLMT_REFTIME GENMASK(5, 0)
#define MT_TMAC_CTCR0_INS_DDLMT_DENSITY GENMASK(15, 12)