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| author | Lorenzo Bianconi <lorenzo@kernel.org> | 2020-03-17 17:41:32 +0100 |
|---|---|---|
| committer | Felix Fietkau <nbd@nbd.name> | 2020-03-17 17:48:00 +0100 |
| commit | f40ac0f3d3c0e2b17185e1707a3b4552e5187dd5 (patch) | |
| tree | 27515fbfdf7d13e2d45c442f0a44623a1019e060 /drivers/net/wireless/mediatek/mt76/mt7615/regs.h | |
| parent | mt76: mt7615: get rid of sta_rec_wtbl data structure (diff) | |
| download | linux-f40ac0f3d3c0e2b17185e1707a3b4552e5187dd5.tar.xz linux-f40ac0f3d3c0e2b17185e1707a3b4552e5187dd5.zip | |
mt76: mt7615: introduce mt7663e support
Introduce support for mt7663e 802.11ac 2x2:2 chipset to mt7615 driver.
Co-developed-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Co-developed-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'drivers/net/wireless/mediatek/mt76/mt7615/regs.h')
| -rw-r--r-- | drivers/net/wireless/mediatek/mt76/mt7615/regs.h | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/regs.h b/drivers/net/wireless/mediatek/mt76/mt7615/regs.h index 928e5a841885..1e0d95b917e1 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/regs.h +++ b/drivers/net/wireless/mediatek/mt76/mt7615/regs.h @@ -7,7 +7,9 @@ enum mt7615_reg_base { MT_TOP_CFG_BASE, MT_HW_BASE, + MT_DMA_SHDL_BASE, MT_PCIE_REMAP_2, + MT_ARB_BASE, MT_HIF_BASE, MT_CSR_BASE, MT_PHY_BASE, @@ -40,6 +42,8 @@ enum mt7615_reg_base { #define MT_TOP_MISC2 ((dev)->reg_map[MT_TOP_CFG_BASE] + 0x134) #define MT_TOP_MISC2_FW_STATE GENMASK(2, 0) +#define MT7663_TOP_MISC2_FW_STATE GENMASK(3, 1) + #define MT_MCU_BASE 0x2000 #define MT_MCU(ofs) (MT_MCU_BASE + (ofs)) @@ -58,6 +62,10 @@ enum mt7615_reg_base { #define MT7663_MCU_PCIE_REMAP_2_OFFSET GENMASK(15, 0) #define MT7663_MCU_PCIE_REMAP_2_BASE GENMASK(31, 16) +#define MT_HIF2_BASE 0xf0000 +#define MT_HIF2(ofs) (MT_HIF2_BASE + (ofs)) +#define MT_PCIE_IRQ_ENABLE MT_HIF2(0x188) + #define MT_CFG_LPCR_HOST MT_HIF(0x1f0) #define MT_CFG_LPCR_HOST_FW_OWN BIT(0) #define MT_CFG_LPCR_HOST_DRV_OWN BIT(1) @@ -209,7 +217,7 @@ enum mt7615_reg_base { #define MT_AGG_SCR MT_WF_AGG(0x0fc) #define MT_AGG_SCR_NLNAV_MID_PTEC_DIS BIT(3) -#define MT_WF_ARB_BASE 0x20c00 +#define MT_WF_ARB_BASE ((dev)->reg_map[MT_ARB_BASE]) #define MT_WF_ARB(ofs) (MT_WF_ARB_BASE + (ofs)) #define MT_ARB_SCR MT_WF_ARB(0x080) @@ -400,6 +408,8 @@ enum mt7615_reg_base { #define MT_TX_AGG_CNT(n) MT_WF_MIB(0xa8 + ((n) << 2)) +#define MT_DMA_SHDL(ofs) (dev->reg_map[MT_DMA_SHDL_BASE] + (ofs)) + #define MT_DMASHDL_BASE 0x5000a000 #define MT_DMASHDL_OPTIONAL 0x008 #define MT_DMASHDL_PAGE 0x00c |