diff options
| author | Ping-Ke Shih <pkshih@realtek.com> | 2022-09-08 07:12:50 +0200 |
|---|---|---|
| committer | Kalle Valo <kvalo@kernel.org> | 2022-09-12 13:52:32 +0200 |
| commit | ef16380b69b85ff42e03900f6f7014fb413b42a8 (patch) | |
| tree | 4227192c17cf28fc9634ed0dbd6b03820a1276ff /drivers/net | |
| parent | wifi: rtw89: add DIG register struct to share common algorithm (diff) | |
| download | linux-ef16380b69b85ff42e03900f6f7014fb413b42a8.tar.xz linux-ef16380b69b85ff42e03900f6f7014fb413b42a8.zip | |
wifi: rtw89: 8852c: enable the interference cancellation of MU-MIMO on 6GHz
Enable MU-MIMO interference cancellation (MUIC) to yield expected
performance of receiving MU-MIMO packets on 6GHz.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20220908051257.25353-3-pkshih@realtek.com
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/wireless/realtek/rtw89/reg.h | 2 | ||||
| -rw-r--r-- | drivers/net/wireless/realtek/rtw89/rtw8852c.c | 5 |
2 files changed, 7 insertions, 0 deletions
diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h index 6f29f3c971ab..54cf725d5d0a 100644 --- a/drivers/net/wireless/realtek/rtw89/reg.h +++ b/drivers/net/wireless/realtek/rtw89/reg.h @@ -3680,6 +3680,8 @@ #define R_S1_ADDCK 0x3E00 #define B_S1_ADDCK_I GENMASK(9, 0) #define B_S1_ADDCK_Q GENMASK(19, 10) +#define R_MUIC 0x40F8 +#define B_MUIC_EN BIT(0) #define R_DCFO 0x4264 #define B_DCFO GENMASK(1, 0) #define R_SEG0CSI 0x42AC diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852c.c b/drivers/net/wireless/realtek/rtw89/rtw8852c.c index 6b2056f07ac3..75ba40430bfe 100644 --- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c +++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c @@ -1791,6 +1791,11 @@ static void rtw8852c_set_channel_bb(struct rtw89_dev *rtwdev, } } + if (chan->band_type == RTW89_BAND_6G) + rtw89_phy_write32_set(rtwdev, R_MUIC, B_MUIC_EN); + else + rtw89_phy_write32_clr(rtwdev, R_MUIC, B_MUIC_EN); + rtw8852c_bb_reset_all(rtwdev, phy_idx); } |