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authorFrank Li <Frank.Li@nxp.com>2023-08-21 18:16:17 +0200
committerVinod Koul <vkoul@kernel.org>2023-08-22 16:41:03 +0200
commit72f5801a4e2b7122ed8ff5672ea965a0b3458e6b (patch)
tree886afd23a0c87d809f48649a681f07fd1d24e53c /drivers/nfc
parentdt-bindings: fsl-dma: fsl-edma: add edma3 compatible string (diff)
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dmaengine: fsl-edma: integrate v3 support
Significant alterations have been made to the EDMA v3's register layout. Now, each channel possesses a separate address space, encapsulating all channel-related controls and statuses, including IRQs. There are changes in bit position definitions as well. However, the fundamental control flow remains analogous to the previous versions. EDMA v3 was utilized in imx8qm, imx93, and will be in forthcoming chips. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20230821161617.2142561-13-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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