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author | Bjorn Helgaas <bhelgaas@google.com> | 2022-01-13 16:57:52 +0100 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2022-01-13 16:57:52 +0100 |
commit | da43f08db236987f9421ccb14a675ce8bfd51707 (patch) | |
tree | 7fcea7060d4ebafc43ad411b0efcd781e4dd599e /drivers/pci/controller | |
parent | Merge branch 'remotes/lorenzo/pci/bridge-emul' (diff) | |
parent | misc: pci_endpoint_test: Terminate statement with semicolon (diff) | |
download | linux-da43f08db236987f9421ccb14a675ce8bfd51707.tar.xz linux-da43f08db236987f9421ccb14a675ce8bfd51707.zip |
Merge branch 'pci/misc'
- Sort Intel Device IDs by value (Andy Shevchenko)
- Change Capability offsets to hex to match spec (Baruch Siach)
- Correct misspellings (Krzysztof WilczyĆski)
- Terminate statement with semicolon in pci_endpoint_test.c (Ming Wang)
* pci/misc:
misc: pci_endpoint_test: Terminate statement with semicolon
PCI: Correct misspelled words
PCI: Change capability register offsets to hex
PCI: Sort Intel Device IDs by value
Diffstat (limited to 'drivers/pci/controller')
-rw-r--r-- | drivers/pci/controller/cadence/pcie-cadence.h | 2 | ||||
-rw-r--r-- | drivers/pci/controller/pcie-mediatek-gen3.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/pci/controller/cadence/pcie-cadence.h b/drivers/pci/controller/cadence/pcie-cadence.h index 262421e5d917..c8a27b6290ce 100644 --- a/drivers/pci/controller/cadence/pcie-cadence.h +++ b/drivers/pci/controller/cadence/pcie-cadence.h @@ -310,7 +310,7 @@ struct cdns_pcie { * single function at a time * @vendor_id: PCI vendor ID * @device_id: PCI device ID - * @avail_ib_bar: Satus of RP_BAR0, RP_BAR1 and RP_NO_BAR if it's free or + * @avail_ib_bar: Status of RP_BAR0, RP_BAR1 and RP_NO_BAR if it's free or * available * @quirk_retrain_flag: Retrain link as quirk for PCIe Gen2 * @quirk_detect_quiet_flag: LTSSM Detect Quiet min delay set as quirk diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c index 21207df680cc..4b3a4df92018 100644 --- a/drivers/pci/controller/pcie-mediatek-gen3.c +++ b/drivers/pci/controller/pcie-mediatek-gen3.c @@ -311,7 +311,7 @@ static int mtk_pcie_startup_port(struct mtk_pcie_port *port) writel_relaxed(val, port->base + PCIE_RST_CTRL_REG); /* - * Described in PCIe CEM specification setctions 2.2 (PERST# Signal) + * Described in PCIe CEM specification sections 2.2 (PERST# Signal) * and 2.2.1 (Initial Power-Up (G3 to S0)). * The deassertion of PERST# should be delayed 100ms (TPVPERL) * for the power and clock to become stable. |