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authorHou Zhiqiang <Zhiqiang.Hou@nxp.com>2020-02-13 05:06:37 +0100
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2020-02-21 12:53:22 +0100
commitfc99b3311af7125c46b56e753dc1a65c27b0d7e2 (patch)
tree8c55012802cf2abfb54de3734d1697654ce20021 /drivers/pci
parentPCI: mobiveil: Add callback function for interrupt initialization (diff)
downloadlinux-fc99b3311af7125c46b56e753dc1a65c27b0d7e2.tar.xz
linux-fc99b3311af7125c46b56e753dc1a65c27b0d7e2.zip
PCI: mobiveil: Add callback function for link up check
Platforms integrating the Mobiveil GPEX can implement a specific mechanism to check the link status. Add a callback to enable platform specific link status functions. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [lorenzo.pieralisi@arm.com: updated log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/controller/mobiveil/pcie-mobiveil.c3
-rw-r--r--drivers/pci/controller/mobiveil/pcie-mobiveil.h5
2 files changed, 8 insertions, 0 deletions
diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.c b/drivers/pci/controller/mobiveil/pcie-mobiveil.c
index 8215d7eeff4e..23ab904989ea 100644
--- a/drivers/pci/controller/mobiveil/pcie-mobiveil.c
+++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.c
@@ -125,6 +125,9 @@ void mobiveil_csr_write(struct mobiveil_pcie *pcie, u32 val, u32 off,
bool mobiveil_pcie_link_up(struct mobiveil_pcie *pcie)
{
+ if (pcie->ops->link_up)
+ return pcie->ops->link_up(pcie);
+
return (mobiveil_csr_readl(pcie, LTSSM_STATUS) &
LTSSM_STATUS_L0_MASK) == LTSSM_STATUS_L0;
}
diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
index 1f7d9da76542..63eec5618af2 100644
--- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h
+++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
@@ -148,6 +148,10 @@ struct mobiveil_root_port {
struct pci_host_bridge *bridge;
};
+struct mobiveil_pab_ops {
+ int (*link_up)(struct mobiveil_pcie *pcie);
+};
+
struct mobiveil_pcie {
struct platform_device *pdev;
void __iomem *csr_axi_slave_base; /* root port config base */
@@ -157,6 +161,7 @@ struct mobiveil_pcie {
int ppio_wins;
int ob_wins_configured; /* configured outbound windows */
int ib_wins_configured; /* configured inbound windows */
+ const struct mobiveil_pab_ops *ops;
struct mobiveil_root_port rp;
};