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| author | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2023-05-26 11:58:23 +0200 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2023-06-26 02:47:09 +0200 |
| commit | 5d7107c72796df3be2ba574f1cf6eca75c60d5ef (patch) | |
| tree | 7b101326d5f75aa08f4fadf6ee79c22e049b0c72 /drivers/perf/Kconfig | |
| parent | cxl/pci: Find and register CXL PMU devices (diff) | |
| download | linux-5d7107c72796df3be2ba574f1cf6eca75c60d5ef.tar.xz linux-5d7107c72796df3be2ba574f1cf6eca75c60d5ef.zip | |
perf: CXL Performance Monitoring Unit driver
CXL rev 3.0 introduces a standard performance monitoring hardware
block to CXL. Instances are discovered using CXL Register Locator DVSEC
entries. Each CXL component may have multiple PMUs.
This initial driver supports a subset of types of counter.
It supports counters that are either fixed or configurable, but requires
that they support the ability to freeze and write value whilst frozen.
Development done with QEMU model which will be posted shortly.
Example:
$ perf stat -a -e cxl_pmu_mem0.0/h2d_req_snpcur/ -e cxl_pmu_mem0.0/h2d_req_snpdata/ -e cxl_pmu_mem0.0/clock_ticks/ sleep 1
Performance counter stats for 'system wide':
96,757,023,244,321 cxl_pmu_mem0.0/h2d_req_snpcur/
96,757,023,244,365 cxl_pmu_mem0.0/h2d_req_snpdata/
193,514,046,488,653 cxl_pmu_mem0.0/clock_ticks/
1.090539600 seconds time elapsed
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20230526095824.16336-5-Jonathan.Cameron@huawei.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/perf/Kconfig')
| -rw-r--r-- | drivers/perf/Kconfig | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/perf/Kconfig b/drivers/perf/Kconfig index 711f82400086..2d2dd400fed2 100644 --- a/drivers/perf/Kconfig +++ b/drivers/perf/Kconfig @@ -213,4 +213,17 @@ source "drivers/perf/arm_cspmu/Kconfig" source "drivers/perf/amlogic/Kconfig" +config CXL_PMU + tristate "CXL Performance Monitoring Unit" + depends on CXL_BUS + help + Support performance monitoring as defined in CXL rev 3.0 + section 13.2: Performance Monitoring. CXL components may have + one or more CXL Performance Monitoring Units (CPMUs). + + Say 'y/m' to enable a driver that will attach to performance + monitoring units and provide standard perf based interfaces. + + If unsure say 'm'. + endmenu |