diff options
| author | Atish Patra <atish.patra@wdc.com> | 2022-02-19 01:46:57 +0100 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2022-03-21 22:58:33 +0100 |
| commit | e9991434596f5373dfd75857b445eb92a9253c56 (patch) | |
| tree | b39e3c364207841faf568f86332c8a087b8fe622 /drivers/perf/riscv_pmu.c | |
| parent | RISC-V: Add RISC-V SBI PMU extension definitions (diff) | |
| download | linux-e9991434596f5373dfd75857b445eb92a9253c56.tar.xz linux-e9991434596f5373dfd75857b445eb92a9253c56.zip | |
RISC-V: Add perf platform driver based on SBI PMU extension
RISC-V SBI specification added a PMU extension that allows to configure
start/stop any pmu counter. The RISC-V perf can use most of the generic
perf features except interrupt overflow and event filtering based on
privilege mode which will be added in future.
It also allows to monitor a handful of firmware counters that can provide
insights into firmware activity during a performance analysis.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'drivers/perf/riscv_pmu.c')
| -rw-r--r-- | drivers/perf/riscv_pmu.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/perf/riscv_pmu.c b/drivers/perf/riscv_pmu.c index 590a5789c128..b2b8d2074ed0 100644 --- a/drivers/perf/riscv_pmu.c +++ b/drivers/perf/riscv_pmu.c @@ -15,6 +15,8 @@ #include <linux/printk.h> #include <linux/smp.h> +#include <asm/sbi.h> + static unsigned long csr_read_num(int csr_num) { #define switchcase_csr_read(__csr_num, __val) {\ |