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authorYicong Yang <yangyicong@hisilicon.com>2024-08-29 11:03:31 +0200
committerWill Deacon <will@kernel.org>2024-08-30 12:43:10 +0200
commit17bf68aeb3642221e3e770399b5a52f370747ac1 (patch)
tree411dbf6292484093df16568520344e18ae4e9268 /drivers/perf
parentdrivers/perf: hisi_pcie: Record hardware counts correctly (diff)
downloadlinux-17bf68aeb3642221e3e770399b5a52f370747ac1.tar.xz
linux-17bf68aeb3642221e3e770399b5a52f370747ac1.zip
drivers/perf: hisi_pcie: Fix TLP headers bandwidth counting
We make the initial value of event ctrl register as HISI_PCIE_INIT_SET and modify according to the user options. This will make TLP headers bandwidth only counting never take effect since HISI_PCIE_INIT_SET configures to count the TLP payloads bandwidth. Fix this by making the initial value of event ctrl register as 0. Fixes: 17d573984d4d ("drivers/perf: hisi: Add TLP filter support") Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20240829090332.28756-3-yangyicong@huawei.com Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'drivers/perf')
-rw-r--r--drivers/perf/hisilicon/hisi_pcie_pmu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/perf/hisilicon/hisi_pcie_pmu.c b/drivers/perf/hisilicon/hisi_pcie_pmu.c
index fba569a8640c..f7d6c59d9930 100644
--- a/drivers/perf/hisilicon/hisi_pcie_pmu.c
+++ b/drivers/perf/hisilicon/hisi_pcie_pmu.c
@@ -208,7 +208,7 @@ static void hisi_pcie_pmu_writeq(struct hisi_pcie_pmu *pcie_pmu, u32 reg_offset,
static u64 hisi_pcie_pmu_get_event_ctrl_val(struct perf_event *event)
{
u64 port, trig_len, thr_len, len_mode;
- u64 reg = HISI_PCIE_INIT_SET;
+ u64 reg = 0;
/* Config HISI_PCIE_EVENT_CTRL according to event. */
reg |= FIELD_PREP(HISI_PCIE_EVENT_M, hisi_pcie_get_real_event(event));