diff options
author | Rohit Agarwal <quic_rohiagar@quicinc.com> | 2023-05-15 08:46:09 +0200 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2023-05-16 15:03:37 +0200 |
commit | c7a291dbbce9ca43d780d360fe92bfe9c6c39fe1 (patch) | |
tree | 86dea1636efcd76652457d9498a67a5eec573639 /drivers/pinctrl/qcom/pinctrl-sm6115.c | |
parent | pinctrl: qcom: spmi-gpio: Add PM8953 support (diff) | |
download | linux-c7a291dbbce9ca43d780d360fe92bfe9c6c39fe1.tar.xz linux-c7a291dbbce9ca43d780d360fe92bfe9c6c39fe1.zip |
pinctrl: qcom: Remove the msm_function struct
Remove the msm_function struct to reuse the generic pinfunction
struct. Also, define a generic PINFUNCTION macro that can be used across
qcom target specific pinctrl files to avoid code repetition.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1684133170-18540-2-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/qcom/pinctrl-sm6115.c')
-rw-r--r-- | drivers/pinctrl/qcom/pinctrl-sm6115.c | 144 |
1 files changed, 68 insertions, 76 deletions
diff --git a/drivers/pinctrl/qcom/pinctrl-sm6115.c b/drivers/pinctrl/qcom/pinctrl-sm6115.c index b3a0161ca377..73408ebdc1a1 100644 --- a/drivers/pinctrl/qcom/pinctrl-sm6115.c +++ b/drivers/pinctrl/qcom/pinctrl-sm6115.c @@ -6,7 +6,6 @@ #include <linux/module.h> #include <linux/of.h> #include <linux/platform_device.h> -#include <linux/pinctrl/pinctrl.h> #include "pinctrl-msm.h" @@ -22,13 +21,6 @@ enum { WEST }; -#define FUNCTION(fname) \ - [msm_mux_##fname] = { \ - .name = #fname, \ - .groups = fname##_groups, \ - .ngroups = ARRAY_SIZE(fname##_groups), \ - } - #define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ { \ .name = "gpio" #id, \ @@ -676,74 +668,74 @@ static const char * const ddr_pxi3_groups[] = { "gpio104", "gpio105", }; -static const struct msm_function sm6115_functions[] = { - FUNCTION(adsp_ext), - FUNCTION(agera_pll), - FUNCTION(atest), - FUNCTION(cam_mclk), - FUNCTION(cci_async), - FUNCTION(cci_i2c), - FUNCTION(cci_timer), - FUNCTION(cri_trng), - FUNCTION(dac_calib), - FUNCTION(dbg_out), - FUNCTION(ddr_bist), - FUNCTION(ddr_pxi0), - FUNCTION(ddr_pxi1), - FUNCTION(ddr_pxi2), - FUNCTION(ddr_pxi3), - FUNCTION(gcc_gp1), - FUNCTION(gcc_gp2), - FUNCTION(gcc_gp3), - FUNCTION(gpio), - FUNCTION(gp_pdm0), - FUNCTION(gp_pdm1), - FUNCTION(gp_pdm2), - FUNCTION(gsm0_tx), - FUNCTION(gsm1_tx), - FUNCTION(jitter_bist), - FUNCTION(mdp_vsync), - FUNCTION(mdp_vsync_out_0), - FUNCTION(mdp_vsync_out_1), - FUNCTION(mpm_pwr), - FUNCTION(mss_lte), - FUNCTION(m_voc), - FUNCTION(nav_gpio), - FUNCTION(pa_indicator), - FUNCTION(pbs), - FUNCTION(pbs_out), - FUNCTION(phase_flag), - FUNCTION(pll_bist), - FUNCTION(pll_bypassnl), - FUNCTION(pll_reset), - FUNCTION(prng_rosc), - FUNCTION(qdss_cti), - FUNCTION(qdss_gpio), - FUNCTION(qup0), - FUNCTION(qup1), - FUNCTION(qup2), - FUNCTION(qup3), - FUNCTION(qup4), - FUNCTION(qup5), - FUNCTION(sdc1_tb), - FUNCTION(sdc2_tb), - FUNCTION(sd_write), - FUNCTION(ssbi_wtr1), - FUNCTION(tgu), - FUNCTION(tsense_pwm), - FUNCTION(uim1_clk), - FUNCTION(uim1_data), - FUNCTION(uim1_present), - FUNCTION(uim1_reset), - FUNCTION(uim2_clk), - FUNCTION(uim2_data), - FUNCTION(uim2_present), - FUNCTION(uim2_reset), - FUNCTION(usb_phy), - FUNCTION(vfr_1), - FUNCTION(vsense_trigger), - FUNCTION(wlan1_adc0), - FUNCTION(wlan1_adc1), +static const struct pinfunction sm6115_functions[] = { + MSM_PIN_FUNCTION(adsp_ext), + MSM_PIN_FUNCTION(agera_pll), + MSM_PIN_FUNCTION(atest), + MSM_PIN_FUNCTION(cam_mclk), + MSM_PIN_FUNCTION(cci_async), + MSM_PIN_FUNCTION(cci_i2c), + MSM_PIN_FUNCTION(cci_timer), + MSM_PIN_FUNCTION(cri_trng), + MSM_PIN_FUNCTION(dac_calib), + MSM_PIN_FUNCTION(dbg_out), + MSM_PIN_FUNCTION(ddr_bist), + MSM_PIN_FUNCTION(ddr_pxi0), + MSM_PIN_FUNCTION(ddr_pxi1), + MSM_PIN_FUNCTION(ddr_pxi2), + MSM_PIN_FUNCTION(ddr_pxi3), + MSM_PIN_FUNCTION(gcc_gp1), + MSM_PIN_FUNCTION(gcc_gp2), + MSM_PIN_FUNCTION(gcc_gp3), + MSM_PIN_FUNCTION(gpio), + MSM_PIN_FUNCTION(gp_pdm0), + MSM_PIN_FUNCTION(gp_pdm1), + MSM_PIN_FUNCTION(gp_pdm2), + MSM_PIN_FUNCTION(gsm0_tx), + MSM_PIN_FUNCTION(gsm1_tx), + MSM_PIN_FUNCTION(jitter_bist), + MSM_PIN_FUNCTION(mdp_vsync), + MSM_PIN_FUNCTION(mdp_vsync_out_0), + MSM_PIN_FUNCTION(mdp_vsync_out_1), + MSM_PIN_FUNCTION(mpm_pwr), + MSM_PIN_FUNCTION(mss_lte), + MSM_PIN_FUNCTION(m_voc), + MSM_PIN_FUNCTION(nav_gpio), + MSM_PIN_FUNCTION(pa_indicator), + MSM_PIN_FUNCTION(pbs), + MSM_PIN_FUNCTION(pbs_out), + MSM_PIN_FUNCTION(phase_flag), + MSM_PIN_FUNCTION(pll_bist), + MSM_PIN_FUNCTION(pll_bypassnl), + MSM_PIN_FUNCTION(pll_reset), + MSM_PIN_FUNCTION(prng_rosc), + MSM_PIN_FUNCTION(qdss_cti), + MSM_PIN_FUNCTION(qdss_gpio), + MSM_PIN_FUNCTION(qup0), + MSM_PIN_FUNCTION(qup1), + MSM_PIN_FUNCTION(qup2), + MSM_PIN_FUNCTION(qup3), + MSM_PIN_FUNCTION(qup4), + MSM_PIN_FUNCTION(qup5), + MSM_PIN_FUNCTION(sdc1_tb), + MSM_PIN_FUNCTION(sdc2_tb), + MSM_PIN_FUNCTION(sd_write), + MSM_PIN_FUNCTION(ssbi_wtr1), + MSM_PIN_FUNCTION(tgu), + MSM_PIN_FUNCTION(tsense_pwm), + MSM_PIN_FUNCTION(uim1_clk), + MSM_PIN_FUNCTION(uim1_data), + MSM_PIN_FUNCTION(uim1_present), + MSM_PIN_FUNCTION(uim1_reset), + MSM_PIN_FUNCTION(uim2_clk), + MSM_PIN_FUNCTION(uim2_data), + MSM_PIN_FUNCTION(uim2_present), + MSM_PIN_FUNCTION(uim2_reset), + MSM_PIN_FUNCTION(usb_phy), + MSM_PIN_FUNCTION(vfr_1), + MSM_PIN_FUNCTION(vsense_trigger), + MSM_PIN_FUNCTION(wlan1_adc0), + MSM_PIN_FUNCTION(wlan1_adc1), }; /* Every pin is maintained as a single group, and missing or non-existing pin |