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author | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-03-03 14:26:14 +0100 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-03-24 10:38:29 +0100 |
commit | b82fd2df17afc53580e8aeaee243dde4b23b9e79 (patch) | |
tree | 1e3cf81b16e767c73ad5a361f2e1951ecfeb218a /drivers/pinctrl | |
parent | pinctrl: renesas: r8a77965: Add vin4_g8 and vin5_high8 pins (diff) | |
download | linux-b82fd2df17afc53580e8aeaee243dde4b23b9e79.tar.xz linux-b82fd2df17afc53580e8aeaee243dde4b23b9e79.zip |
pinctrl: renesas: Make sh_pfc_pin_to_bias_reg() static
Now all R-Car pin control drivers have been converted to the common
R-Car bias handling, sh_pfc_pin_to_bias_reg() is only called from a
single place. Move it from core.c to pinctrl.c, make it static, and
rename it to rcar_pin_to_bias_reg(), as it is specific to R-Car SoCs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20210303132619.3938128-2-geert+renesas@glider.be
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r-- | drivers/pinctrl/renesas/core.c | 20 | ||||
-rw-r--r-- | drivers/pinctrl/renesas/core.h | 4 | ||||
-rw-r--r-- | drivers/pinctrl/renesas/pinctrl.c | 24 |
3 files changed, 22 insertions, 26 deletions
diff --git a/drivers/pinctrl/renesas/core.c b/drivers/pinctrl/renesas/core.c index 2bfd3006f6fd..5ccc49b387f1 100644 --- a/drivers/pinctrl/renesas/core.c +++ b/drivers/pinctrl/renesas/core.c @@ -394,26 +394,6 @@ int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type) return 0; } -const struct pinmux_bias_reg * -sh_pfc_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin, - unsigned int *bit) -{ - unsigned int i, j; - - for (i = 0; pfc->info->bias_regs[i].puen; i++) { - for (j = 0; j < ARRAY_SIZE(pfc->info->bias_regs[i].pins); j++) { - if (pfc->info->bias_regs[i].pins[j] == pin) { - *bit = j; - return &pfc->info->bias_regs[i]; - } - } - } - - WARN_ONCE(1, "Pin %u is not in bias info list\n", pin); - - return NULL; -} - static int sh_pfc_init_ranges(struct sh_pfc *pfc) { struct sh_pfc_pin_range *range; diff --git a/drivers/pinctrl/renesas/core.h b/drivers/pinctrl/renesas/core.h index 5ca7e0830ae9..19f7b4308fac 100644 --- a/drivers/pinctrl/renesas/core.h +++ b/drivers/pinctrl/renesas/core.h @@ -29,10 +29,6 @@ void sh_pfc_write(struct sh_pfc *pfc, u32 reg, u32 data); int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin); int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type); -const struct pinmux_bias_reg * -sh_pfc_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin, - unsigned int *bit); - unsigned int rcar_pinmux_get_bias(struct sh_pfc *pfc, unsigned int pin); void rcar_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin, unsigned int bias); diff --git a/drivers/pinctrl/renesas/pinctrl.c b/drivers/pinctrl/renesas/pinctrl.c index a49f74730272..963d217b9403 100644 --- a/drivers/pinctrl/renesas/pinctrl.c +++ b/drivers/pinctrl/renesas/pinctrl.c @@ -840,12 +840,32 @@ int sh_pfc_register_pinctrl(struct sh_pfc *pfc) return pinctrl_enable(pmx->pctl); } +static const struct pinmux_bias_reg * +rcar_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin, + unsigned int *bit) +{ + unsigned int i, j; + + for (i = 0; pfc->info->bias_regs[i].puen; i++) { + for (j = 0; j < ARRAY_SIZE(pfc->info->bias_regs[i].pins); j++) { + if (pfc->info->bias_regs[i].pins[j] == pin) { + *bit = j; + return &pfc->info->bias_regs[i]; + } + } + } + + WARN_ONCE(1, "Pin %u is not in bias info list\n", pin); + + return NULL; +} + unsigned int rcar_pinmux_get_bias(struct sh_pfc *pfc, unsigned int pin) { const struct pinmux_bias_reg *reg; unsigned int bit; - reg = sh_pfc_pin_to_bias_reg(pfc, pin, &bit); + reg = rcar_pin_to_bias_reg(pfc, pin, &bit); if (!reg) return PIN_CONFIG_BIAS_DISABLE; @@ -864,7 +884,7 @@ void rcar_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin, u32 enable, updown; unsigned int bit; - reg = sh_pfc_pin_to_bias_reg(pfc, pin, &bit); + reg = rcar_pin_to_bias_reg(pfc, pin, &bit); if (!reg) return; |