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authorGeert Uytterhoeven <geert+renesas@glider.be>2018-12-26 09:19:34 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2019-01-21 13:24:52 +0100
commitf7d8b568e204d295bf0e780cea10cab1f84be31e (patch)
treea653d01a4302e329e565ef10880f7127ff5f181e /drivers/pinctrl
parentpinctrl: sh-pfc: r8a77995: Fix MOD_SEL bit numbering (diff)
downloadlinux-f7d8b568e204d295bf0e780cea10cab1f84be31e.tar.xz
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pinctrl: sh-pfc: r8a77990: GP6_9 does not have pull-down capability
Hence remove the SH_PFC_PIN_CFG_PULL_DOWN flag from the GP6_9 GPIO description. Fixes: 83f6941a42a5e773 ("pinctrl: sh-pfc: r8a77990: Add bias pinconf support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a77990.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
index 821a425e285a..33c154357262 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
@@ -30,7 +30,16 @@
PORT_GP_CFG_1(3, 15, fn, sfx, CFG_FLAGS), \
PORT_GP_CFG_11(4, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \
PORT_GP_CFG_20(5, fn, sfx, CFG_FLAGS), \
- PORT_GP_CFG_18(6, fn, sfx, CFG_FLAGS)
+ PORT_GP_CFG_9(6, fn, sfx, CFG_FLAGS), \
+ PORT_GP_CFG_1(6, 9, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
+ PORT_GP_CFG_1(6, 10, fn, sfx, CFG_FLAGS), \
+ PORT_GP_CFG_1(6, 11, fn, sfx, CFG_FLAGS), \
+ PORT_GP_CFG_1(6, 12, fn, sfx, CFG_FLAGS), \
+ PORT_GP_CFG_1(6, 13, fn, sfx, CFG_FLAGS), \
+ PORT_GP_CFG_1(6, 14, fn, sfx, CFG_FLAGS), \
+ PORT_GP_CFG_1(6, 15, fn, sfx, CFG_FLAGS), \
+ PORT_GP_CFG_1(6, 16, fn, sfx, CFG_FLAGS), \
+ PORT_GP_CFG_1(6, 17, fn, sfx, CFG_FLAGS)
/*
* F_() : just information
* FM() : macro for FN_xxx / xxx_MARK