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author | Hans de Goede <hdegoede@redhat.com> | 2018-10-12 12:12:27 +0200 |
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committer | Thierry Reding <thierry.reding@gmail.com> | 2018-10-12 12:31:58 +0200 |
commit | 6a425ecd19a2c0e19a501323216ecf987de07841 (patch) | |
tree | 7c031598467278debff4dda3ca55f6c2bb8e01f7 /drivers/pwm/pwm-lpss.h | |
parent | pwm: lpss: Move struct pwm_lpss_chip definition to the header file (diff) | |
download | linux-6a425ecd19a2c0e19a501323216ecf987de07841.tar.xz linux-6a425ecd19a2c0e19a501323216ecf987de07841.zip |
pwm: lpss: Check PWM powerstate after resume on Cherry Trail devices
The _PS0 method for the integrated graphics on some Cherry Trail devices
(observed on a HP Pavilion X2 10-p0XX) turns on the PWM chip (puts it in
D0), causing an inconsistency between the state the pm-core thinks it is
in (left runtime suspended as it was before the suspend/resume) and the
state it actually is in.
Interestingly enough this is done on a device where the pwm controller is
not used for the backlight at all, since it uses an eDP panel. On devices
where the PWM is used this is not a problem since we will resume it
ourselves anyways.
This inconsistency causes us to never suspend the pwm controller again,
which causes the device to not be able to reach S0ix states when suspended.
This commit adds a resume-complete handler, which when we think the device
is still run-time suspended checks the actual power-state and if necessary
updates the rpm-core's internal state.
This fixes the Pavilion X2 10-p0XX not reaching S0ix states when suspended.
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/pwm/pwm-lpss.h')
-rw-r--r-- | drivers/pwm/pwm-lpss.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/pwm/pwm-lpss.h b/drivers/pwm/pwm-lpss.h index 8f029ed263af..1a2575d25bea 100644 --- a/drivers/pwm/pwm-lpss.h +++ b/drivers/pwm/pwm-lpss.h @@ -30,6 +30,8 @@ struct pwm_lpss_boardinfo { unsigned int npwm; unsigned long base_unit_bits; bool bypass; + /* Some devices have AML code messing with the state underneath us */ + bool check_power_on_resume; }; struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r, |