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authorStephen M. Cameron <scameron@beardog.cce.hp.com>2014-05-29 17:53:07 +0200
committerChristoph Hellwig <hch@lst.de>2014-06-02 09:54:55 +0200
commit072b0518b0f75296443a0df9fe7f25e052e62652 (patch)
treefbfb396427d949c0a05440fe8b8870a2e3e51968 /drivers/scsi/hpsa.h
parenthpsa: choose number of reply queues more intelligently. (diff)
downloadlinux-072b0518b0f75296443a0df9fe7f25e052e62652.tar.xz
linux-072b0518b0f75296443a0df9fe7f25e052e62652.zip
hpsa: allocate reply queues individually
Now that we can allocate more than 4 reply queues (up to 64) we shouldn't try to make them share the same allocation but should allocate them separately. Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com> Reviewed-by: Mike Miller <michael.miller@canonical.com> Reviewed-by: Scott Teel <scott.teel@hp.com> Signed-off-by: Christoph Hellwig <hch@lst.de>
Diffstat (limited to 'drivers/scsi/hpsa.h')
-rw-r--r--drivers/scsi/hpsa.h13
1 files changed, 6 insertions, 7 deletions
diff --git a/drivers/scsi/hpsa.h b/drivers/scsi/hpsa.h
index 5ee3e7a9126d..60d72fc3c180 100644
--- a/drivers/scsi/hpsa.h
+++ b/drivers/scsi/hpsa.h
@@ -57,11 +57,12 @@ struct hpsa_scsi_dev_t {
};
-struct reply_pool {
+struct reply_queue_buffer {
u64 *head;
size_t size;
u8 wraparound;
u32 current_entry;
+ dma_addr_t busaddr;
};
#pragma pack(1)
@@ -174,11 +175,9 @@ struct ctlr_info {
/*
* Performant mode completion buffers
*/
- u64 *reply_pool;
- size_t reply_pool_size;
- struct reply_pool reply_queue[MAX_REPLY_QUEUES];
+ size_t reply_queue_size;
+ struct reply_queue_buffer reply_queue[MAX_REPLY_QUEUES];
u8 nreply_queues;
- dma_addr_t reply_pool_dhandle;
u32 *blockFetchTable;
u32 *ioaccel1_blockFetchTable;
u32 *ioaccel2_blockFetchTable;
@@ -392,7 +391,7 @@ static void SA5_performant_intr_mask(struct ctlr_info *h, unsigned long val)
static unsigned long SA5_performant_completed(struct ctlr_info *h, u8 q)
{
- struct reply_pool *rq = &h->reply_queue[q];
+ struct reply_queue_buffer *rq = &h->reply_queue[q];
unsigned long flags, register_value = FIFO_EMPTY;
/* msi auto clears the interrupt pending bit. */
@@ -507,7 +506,7 @@ static bool SA5_ioaccel_mode1_intr_pending(struct ctlr_info *h)
static unsigned long SA5_ioaccel_mode1_completed(struct ctlr_info *h, u8 q)
{
u64 register_value;
- struct reply_pool *rq = &h->reply_queue[q];
+ struct reply_queue_buffer *rq = &h->reply_queue[q];
unsigned long flags;
BUG_ON(q >= h->nreply_queues);