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| author | Mark Brown <broonie@kernel.org> | 2024-10-01 13:16:13 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2024-10-01 13:16:13 +0200 |
| commit | e8d2b5bd6094e46913df96da48c866cd06b75686 (patch) | |
| tree | 6568079ba1da09886a3ba96dd53046cef0bb932d /drivers/spi/spi-fsl-lpspi.c | |
| parent | Improve error handling in Rockchip SPI drivers (diff) | |
| parent | spi: spi-fsl-lpspi: support effective_speed_hz (diff) | |
| download | linux-e8d2b5bd6094e46913df96da48c866cd06b75686.tar.xz linux-e8d2b5bd6094e46913df96da48c866cd06b75686.zip | |
spi: spi-fsl-lpspi: Some calculation improvements
Merge series from Stefan Wahren <wahrenst@gmx.net>:
This series contains some improvements for spi-fsl-lpspi which are
related to the calculations within fsl_lpspi_set_bitrate.
Diffstat (limited to 'drivers/spi/spi-fsl-lpspi.c')
| -rw-r--r-- | drivers/spi/spi-fsl-lpspi.c | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index 9edcaf2fdc56..40f5c8fdba76 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -92,6 +92,7 @@ struct lpspi_config { u8 prescale; u16 mode; u32 speed_hz; + u32 effective_speed_hz; }; struct fsl_lpspi_data { @@ -315,9 +316,10 @@ static void fsl_lpspi_set_watermark(struct fsl_lpspi_data *fsl_lpspi) static int fsl_lpspi_set_bitrate(struct fsl_lpspi_data *fsl_lpspi) { struct lpspi_config config = fsl_lpspi->config; - unsigned int perclk_rate, scldiv, div; + unsigned int perclk_rate, div; u8 prescale_max; u8 prescale; + int scldiv; perclk_rate = clk_get_rate(fsl_lpspi->clk_per); prescale_max = fsl_lpspi->devtype_data->prescale_max; @@ -338,19 +340,22 @@ static int fsl_lpspi_set_bitrate(struct fsl_lpspi_data *fsl_lpspi) for (prescale = 0; prescale <= prescale_max; prescale++) { scldiv = div / (1 << prescale) - 2; - if (scldiv < 256) { + if (scldiv >= 0 && scldiv < 256) { fsl_lpspi->config.prescale = prescale; break; } } - if (scldiv >= 256) + if (scldiv < 0 || scldiv >= 256) return -EINVAL; writel(scldiv | (scldiv << 8) | ((scldiv >> 1) << 16), fsl_lpspi->base + IMX7ULP_CCR); - dev_dbg(fsl_lpspi->dev, "perclk=%d, speed=%d, prescale=%d, scldiv=%d\n", + fsl_lpspi->config.effective_speed_hz = perclk_rate / (scldiv + 2) * + (1 << prescale); + + dev_dbg(fsl_lpspi->dev, "perclk=%u, speed=%u, prescale=%u, scldiv=%d\n", perclk_rate, config.speed_hz, prescale, scldiv); return 0; @@ -749,6 +754,8 @@ static int fsl_lpspi_transfer_one(struct spi_controller *controller, if (ret < 0) return ret; + t->effective_speed_hz = fsl_lpspi->config.effective_speed_hz; + fsl_lpspi_set_cmd(fsl_lpspi); fsl_lpspi->is_first_byte = false; |