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authorSerge Semin <Sergey.Semin@baikalelectronics.ru>2020-11-17 10:40:54 +0100
committerMark Brown <broonie@kernel.org>2020-11-17 18:08:39 +0100
commita41b0ad07bfa081584218431cb0cd7e7ecc71210 (patch)
tree1820a56891a5bdd77b8b6eb8e82e09ae9fe1f6e8 /drivers/spi/spi-npcm-fiu.c
parentspi: cadence-quadspi: Fix error return code in cqspi_probe (diff)
downloadlinux-a41b0ad07bfa081584218431cb0cd7e7ecc71210.tar.xz
linux-a41b0ad07bfa081584218431cb0cd7e7ecc71210.zip
spi: dw: Set transfer handler before unmasking the IRQs
It turns out the IRQs most like can be unmasked before the controller is enabled with no problematic consequences. The manual doesn't explicitly state that, but the examples perform the controller initialization procedure in that order. So the commit da8f58909e7e ("spi: dw: Unmask IRQs after enabling the chip") hasn't been that required as I thought. But anyway setting the IRQs up after the chip enabling still worth adding since it has simplified the code a bit. The problem is that it has introduced a potential bug. The transfer handler pointer is now initialized after the IRQs are enabled. That may and eventually will cause an invalid or uninitialized callback invocation. Fix that just by performing the callback initialization before the IRQ unmask procedure. Fixes: da8f58909e7e ("spi: dw: Unmask IRQs after enabling the chip") Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Link: https://lore.kernel.org/r/20201117094054.4696-1-Sergey.Semin@baikalelectronics.ru Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-npcm-fiu.c')
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