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author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-05-07 20:06:17 +0200 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-05-07 20:06:17 +0200 |
commit | 38f56f33ca381751f9b8910f67e7a805ec0b68cb (patch) | |
tree | 202f2ce60f3f43a948607ec76c8cc48c1cf73a4b /drivers/spi | |
parent | Merge tag 'soc-for-linus-3' of git://git.kernel.org/pub/scm/linux/kernel/git/... (diff) | |
parent | Merge branch 'late/dt' into next/dt2 (diff) | |
download | linux-38f56f33ca381751f9b8910f67e7a805ec0b68cb.tar.xz linux-38f56f33ca381751f9b8910f67e7a805ec0b68cb.zip |
Merge tag 'dt-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree updates (part 2) from Arnd Bergmann:
"These are mostly new device tree bindings for existing drivers, as
well as changes to the device tree source files to add support for
those devices, and a couple of new boards, most notably Samsung's
Exynos5 based Chromebook.
The changes depend on earlier platform specific updates and touch the
usual platforms: omap, exynos, tegra, mxs, mvebu and davinci."
* tag 'dt-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (169 commits)
ARM: exynos: dts: cros5250: add EC device
ARM: dts: Add sbs-battery for exynos5250-snow
ARM: dts: Add i2c-arbitrator bus for exynos5250-snow
ARM: dts: add mshc controller node for Exynos4x12 SoCs
ARM: dts: Add chip-id controller node on Exynos4/5 SoC
ARM: EXYNOS: Create virtual I/O mapping for Chip-ID controller using device tree
ARM: davinci: da850-evm: add SPI flash support
ARM: davinci: da850: override SPI DT node device name
ARM: davinci: da850: add SPI1 DT node
spi/davinci: add DT binding documentation
spi/davinci: no wildcards in DT compatible property
ARM: dts: mvebu: Convert mvebu device tree files to 64 bits
ARM: dts: mvebu: introduce internal-regs node
ARM: dts: mvebu: Convert all the mvebu files to use the range property
ARM: dts: mvebu: move all peripherals inside soc
ARM: dts: mvebu: fix cpus section indentation
ARM: davinci: da850: add EHRPWM & ECAP DT node
ARM/dts: OMAP3: fix pinctrl-single configuration
ARM: dts: Add OMAP3430 SDP NOR flash memory binding
ARM: dts: Add NOR flash bindings for OMAP2420 H4
...
Diffstat (limited to 'drivers/spi')
-rw-r--r-- | drivers/spi/spi-davinci.c | 4 | ||||
-rw-r--r-- | drivers/spi/spi-mxs.c | 60 |
2 files changed, 11 insertions, 53 deletions
diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index 8234d2259722..2e8f24a1fb95 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c @@ -776,10 +776,10 @@ rx_dma_failed: #if defined(CONFIG_OF) static const struct of_device_id davinci_spi_of_match[] = { { - .compatible = "ti,dm644x-spi", + .compatible = "ti,dm6441-spi", }, { - .compatible = "ti,da8xx-spi", + .compatible = "ti,da830-spi", .data = (void *)SPI_VERSION_2, }, { }, diff --git a/drivers/spi/spi-mxs.c b/drivers/spi/spi-mxs.c index a1d5778e2bbb..84982768cd10 100644 --- a/drivers/spi/spi-mxs.c +++ b/drivers/spi/spi-mxs.c @@ -490,21 +490,6 @@ static int mxs_spi_transfer_one(struct spi_master *master, return status; } -static bool mxs_ssp_dma_filter(struct dma_chan *chan, void *param) -{ - struct mxs_ssp *ssp = param; - - if (!mxs_dma_is_apbh(chan)) - return false; - - if (chan->chan_id != ssp->dma_channel) - return false; - - chan->private = &ssp->dma_data; - - return true; -} - static const struct of_device_id mxs_spi_dt_ids[] = { { .compatible = "fsl,imx23-spi", .data = (void *) IMX23_SSP, }, { .compatible = "fsl,imx28-spi", .data = (void *) IMX28_SSP, }, @@ -520,13 +505,12 @@ static int mxs_spi_probe(struct platform_device *pdev) struct spi_master *master; struct mxs_spi *spi; struct mxs_ssp *ssp; - struct resource *iores, *dmares; + struct resource *iores; struct pinctrl *pinctrl; struct clk *clk; void __iomem *base; - int devid, dma_channel, clk_freq; - int ret = 0, irq_err, irq_dma; - dma_cap_mask_t mask; + int devid, clk_freq; + int ret = 0, irq_err; /* * Default clock speed for the SPI core. 160MHz seems to @@ -537,8 +521,7 @@ static int mxs_spi_probe(struct platform_device *pdev) iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); irq_err = platform_get_irq(pdev, 0); - irq_dma = platform_get_irq(pdev, 1); - if (!iores || irq_err < 0 || irq_dma < 0) + if (!iores || irq_err < 0) return -EINVAL; base = devm_ioremap_resource(&pdev->dev, iores); @@ -553,32 +536,11 @@ static int mxs_spi_probe(struct platform_device *pdev) if (IS_ERR(clk)) return PTR_ERR(clk); - if (np) { - devid = (enum mxs_ssp_id) of_id->data; - /* - * TODO: This is a temporary solution and should be changed - * to use generic DMA binding later when the helpers get in. - */ - ret = of_property_read_u32(np, "fsl,ssp-dma-channel", - &dma_channel); - if (ret) { - dev_err(&pdev->dev, - "Failed to get DMA channel\n"); - return -EINVAL; - } - - ret = of_property_read_u32(np, "clock-frequency", - &clk_freq); - if (ret) - clk_freq = clk_freq_default; - } else { - dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0); - if (!dmares) - return -EINVAL; - devid = pdev->id_entry->driver_data; - dma_channel = dmares->start; + devid = (enum mxs_ssp_id) of_id->data; + ret = of_property_read_u32(np, "clock-frequency", + &clk_freq); + if (ret) clk_freq = clk_freq_default; - } master = spi_alloc_master(&pdev->dev, sizeof(*spi)); if (!master) @@ -597,7 +559,6 @@ static int mxs_spi_probe(struct platform_device *pdev) ssp->clk = clk; ssp->base = base; ssp->devid = devid; - ssp->dma_channel = dma_channel; init_completion(&spi->c); @@ -606,10 +567,7 @@ static int mxs_spi_probe(struct platform_device *pdev) if (ret) goto out_master_free; - dma_cap_zero(mask); - dma_cap_set(DMA_SLAVE, mask); - ssp->dma_data.chan_irq = irq_dma; - ssp->dmach = dma_request_channel(mask, mxs_ssp_dma_filter, ssp); + ssp->dmach = dma_request_slave_channel(&pdev->dev, "rx-tx"); if (!ssp->dmach) { dev_err(ssp->dev, "Failed to request DMA\n"); ret = -ENODEV; |