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authorVahram Aharonyan <vahrama@synopsys.com>2016-11-15 04:16:36 +0100
committerFelipe Balbi <felipe.balbi@linux.intel.com>2016-11-18 12:54:46 +0100
commitab7d2192947c292a289828f95f081583fdfccfea (patch)
tree5cf4dd7a0041d282c9fa1000c5d20223611b07dc /drivers/usb/dwc2
parentusb: dwc2: gadget: Enable descriptor DMA mode (diff)
downloadlinux-ab7d2192947c292a289828f95f081583fdfccfea.tar.xz
linux-ab7d2192947c292a289828f95f081583fdfccfea.zip
usb: dwc2: gadget: Add DDMA isoc related fields to dwc2_hsotg_ep
Preparing for isochronous transfers support adding in DDMA mode. In DDMA isochronous transfers are handled differently compared to Slave and BDMA modes. This is caused by fact that isoc requests contain data for one frame/microframe. HW descriptor should contain data of one frame/microframe as well. Hence each DMA descriptor in the chain will correspond to one usb request. Decided to divide endpoints descriptor chain to two halves - while one will be processed by HW, other one will be under SW control. First part will be passed to HW once ISOC traffic needs to be started. In parallel to HW's work SW will keep creating new entries in the other half of chain if new requests arrive in ep_queue routine. This will allow passing of already pre-prepared descriptors to HW immediately after endpoint gets disabled. The endpoint should be disabled once HW closes descriptor with "L" bit set. Afterwards SW will switch to use first part of chain if more requests are arriving. Add two members to the dwc2_hsotg_ep structure to be used in isochronous transfers' handling in DDMA mode: -isoc_chain_num - indicates which half of EP descriptor chain can be used by SW to add new queued requests while HW is processing other half. -next_desc - index which points to next not yet programmed descriptor in the half of descriptor chain which is under SW control. Also add initialization of these fields in function dwc2_hsotg_ep_enable(). Signed-off-by: Vahram Aharonyan <vahrama@synopsys.com> Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Diffstat (limited to 'drivers/usb/dwc2')
-rw-r--r--drivers/usb/dwc2/core.h5
-rw-r--r--drivers/usb/dwc2/gadget.c2
2 files changed, 7 insertions, 0 deletions
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 4094d3dee25a..5fa05a3ec318 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -175,6 +175,8 @@ struct dwc2_hsotg_req;
* @desc_list_dma: The DMA address of descriptor chain currently in use.
* @desc_list: Pointer to descriptor DMA chain head currently in use.
* @desc_count: Count of entries within the DMA descriptor chain of EP.
+ * @isoc_chain_num: Number of ISOC chain currently in use - either 0 or 1.
+ * @next_desc: index of next free descriptor in the ISOC chain under SW control.
* @total_data: The total number of data bytes done.
* @fifo_size: The size of the FIFO (for periodic IN endpoints)
* @fifo_load: The amount of data loaded into the FIFO (periodic IN)
@@ -226,6 +228,9 @@ struct dwc2_hsotg_ep {
struct dwc2_dma_desc *desc_list;
u8 desc_count;
+ unsigned char isoc_chain_num;
+ unsigned int next_desc;
+
char name[10];
};
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index e12b1f0b0b72..c32520d18d39 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -3356,6 +3356,8 @@ static int dwc2_hsotg_ep_enable(struct usb_ep *ep,
hs_ep->isochronous = 1;
hs_ep->interval = 1 << (desc->bInterval - 1);
hs_ep->target_frame = TARGET_FRAME_INITIAL;
+ hs_ep->isoc_chain_num = 0;
+ hs_ep->next_desc = 0;
if (dir_in) {
hs_ep->periodic = 1;
mask = dwc2_readl(hsotg->regs + DIEPMSK);