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authorMarc Kleine-Budde <mkl@pengutronix.de>2011-10-10 18:38:10 +0200
committerFelipe Balbi <balbi@ti.com>2011-12-12 10:44:45 +0100
commitdd39c358dff41394f20b623fc68be857b6d702ad (patch)
tree138976e023ddff4bfaaed93de6bf9e2e8da02efa /drivers/usb/gadget/ci13xxx_udc.c
parentUSB: ci13xxx_udc: make suspend and resume in gadget driver optional (diff)
downloadlinux-dd39c358dff41394f20b623fc68be857b6d702ad.tar.xz
linux-dd39c358dff41394f20b623fc68be857b6d702ad.zip
USB: ci13xxx_udc: handle controllers with less than 16 EPs
The ci13xxx_udc driver checks the number of endpoints in the udc controller, however some routines expect that the hardware has 16 bidirectional endpoints. This patch improves the driver to work on controllers with less than 16 endpoints like the udc controller found on freescale's mx23 and mx28. Tested-by: Pavankumar Kondeti <pkondeti@codeaurora.org> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/gadget/ci13xxx_udc.c')
-rw-r--r--drivers/usb/gadget/ci13xxx_udc.c16
1 files changed, 14 insertions, 2 deletions
diff --git a/drivers/usb/gadget/ci13xxx_udc.c b/drivers/usb/gadget/ci13xxx_udc.c
index 9db7e7667c2b..8956a2448b33 100644
--- a/drivers/usb/gadget/ci13xxx_udc.c
+++ b/drivers/usb/gadget/ci13xxx_udc.c
@@ -182,6 +182,16 @@ static inline int hw_ep_bit(int num, int dir)
return num + (dir ? 16 : 0);
}
+static int ep_to_bit(int n)
+{
+ int fill = 16 - hw_ep_max / 2;
+
+ if (n >= hw_ep_max / 2)
+ n += fill;
+
+ return n;
+}
+
/**
* hw_aread: reads from register bitfield
* @addr: address relative to bus map
@@ -440,12 +450,13 @@ static int hw_ep_get_halt(int num, int dir)
/**
* hw_test_and_clear_setup_status: test & clear setup status (execute without
* interruption)
- * @n: bit number (endpoint)
+ * @n: endpoint number
*
* This function returns setup status
*/
static int hw_test_and_clear_setup_status(int n)
{
+ n = ep_to_bit(n);
return hw_ctest_and_clear(CAP_ENDPTSETUPSTAT, BIT(n));
}
@@ -641,12 +652,13 @@ static int hw_register_write(u16 addr, u32 data)
/**
* hw_test_and_clear_complete: test & clear complete status (execute without
* interruption)
- * @n: bit number (endpoint)
+ * @n: endpoint number
*
* This function returns complete status
*/
static int hw_test_and_clear_complete(int n)
{
+ n = ep_to_bit(n);
return hw_ctest_and_clear(CAP_ENDPTCOMPLETE, BIT(n));
}