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authorTomi Valkeinen <tomi.valkeinen@ti.com>2021-10-12 15:39:39 +0200
committerTomi Valkeinen <tomi.valkeinen@ideasonboard.com>2021-11-10 12:51:26 +0100
commit1f366c6856e942f61d4ecef709ac952c8dc58d23 (patch)
tree5efcf16941a385bfd5c1e1f07d1b8e7cbeca0af7 /drivers
parentdrm/omap: Make use of the helper function devm_platform_ioremap_resourcexxx() (diff)
downloadlinux-1f366c6856e942f61d4ecef709ac952c8dc58d23.tar.xz
linux-1f366c6856e942f61d4ecef709ac952c8dc58d23.zip
drm/omap: increase DSS5 max tv pclk to 192MHz
DSS5's maximum tv pclk rate (i.e. HDMI) is set to 186MHz, which comes from the TRM (DPLL_HDMI_CLK1 frequency must be lower than 186 MHz). To support DRA76's wide screen HDMI feature, we need to increase this maximum rate. Testing shows that the PLL seems to work fine even with ~240MHz clocks, and even the HDMI output at that clock is stable enough for monitors to show a picture. This holds true for all DRA7 and AM5 SoCs (and probably also for OMAP5). However, the highest we can go without big refactoring to the clocking code is 192MHz, as that is the DSS func clock we get from the PRCM. So, increase the max HDMI pixel clock to 192MHz for now, to allow some more 2k+ modes to work. This patch never had a clear confirmation from HW people, but this change stayed on production trees for multiple years without any report on an eventual breakage. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211012133939.2145462-1-narmstrong@baylibre.com
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/omapdrm/dss/dispc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c
index 24ba1d0831de..b440147ae28b 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -4458,7 +4458,7 @@ static const struct dispc_features omap54xx_dispc_feats = {
.mgr_width_max = 4096,
.mgr_height_max = 4096,
.max_lcd_pclk = 170000000,
- .max_tv_pclk = 186000000,
+ .max_tv_pclk = 192000000,
.max_downscale = 4,
.max_line_width = 2048,
.min_pcd = 1,