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authorLoic Poulain <loic.poulain@intel.com>2014-09-26 16:14:51 +0200
committerLinus Walleij <linus.walleij@linaro.org>2014-10-20 09:05:05 +0200
commit3a71c05e66e597a1349fdbd5f0bb119d8d9cb850 (patch)
treeefe589c92bb4ffbc8c51cd232188f950944239d8 /drivers
parentLinux 3.18-rc1 (diff)
downloadlinux-3a71c05e66e597a1349fdbd5f0bb119d8d9cb850.tar.xz
linux-3a71c05e66e597a1349fdbd5f0bb119d8d9cb850.zip
pinctrl: baytrail: Clear DIRECT_IRQ bit
Direct irq en bit should be cleared for pads using io mode. If not, the io based irq will never be detected. However, this bit can sometimes be misconfigured (BIOS issue). Force clearing of this bit in io mode and trigger a WARN. Signed-off-by: Loic Poulain <loic.poulain@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/pinctrl/pinctrl-baytrail.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/pinctrl/pinctrl-baytrail.c b/drivers/pinctrl/pinctrl-baytrail.c
index e12e5b07f6d7..b83ec87c71fe 100644
--- a/drivers/pinctrl/pinctrl-baytrail.c
+++ b/drivers/pinctrl/pinctrl-baytrail.c
@@ -227,10 +227,14 @@ static int byt_irq_type(struct irq_data *d, unsigned type)
spin_lock_irqsave(&vg->lock, flags);
value = readl(reg);
+ WARN(value & BYT_DIRECT_IRQ_EN,
+ "Bad pad config for io mode, force direct_irq_en bit clearing");
+
/* For level trigges the BYT_TRIG_POS and BYT_TRIG_NEG bits
* are used to indicate high and low level triggering
*/
- value &= ~(BYT_TRIG_POS | BYT_TRIG_NEG | BYT_TRIG_LVL);
+ value &= ~(BYT_DIRECT_IRQ_EN | BYT_TRIG_POS | BYT_TRIG_NEG |
+ BYT_TRIG_LVL);
switch (type) {
case IRQ_TYPE_LEVEL_HIGH: