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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-04-13 19:23:25 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-05-05 12:02:25 +0200 |
| commit | 44778aec5ed9b541bc0ec61d475c35f3087e8024 (patch) | |
| tree | e829b6f76dcd5439a3f18f024f63ad02ecdbf66b /drivers | |
| parent | pinctrl: renesas: Add shorthand for reserved register fields (diff) | |
| download | linux-44778aec5ed9b541bc0ec61d475c35f3087e8024.tar.xz linux-44778aec5ed9b541bc0ec61d475c35f3087e8024.zip | |
pinctrl: renesas: rmobile: Mark unused PORTCR bits reserved
The PULMD bits and the SEC bit in the PORTCR register descriptions on
SH/R-Mobile SoCs are either unused or unsupported. Describe them as
reserved bits using a negative field width value, and drop the
corresponding dummy enum IDs.
This reduces kernel size by 2832 (R-Mobile APE6), 2544 (R-Mobile A1),
and/or 3228 (SH-Mobile AG5) bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/1b123d8f04c2314d5a7a87004971868ba2176499.1649865241.git.geert+renesas@glider.be
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/pinctrl/renesas/sh_pfc.h | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h index 64e3dde99734..12bc279f5733 100644 --- a/drivers/pinctrl/renesas/sh_pfc.h +++ b/drivers/pinctrl/renesas/sh_pfc.h @@ -739,14 +739,12 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info; * PORTnCR helper macro for SH-Mobile/R-Mobile */ #define PORTCR(nr, reg) { \ - PINMUX_CFG_REG_VAR("PORT" nr "CR", reg, 8, GROUP(2, 2, 1, 3), \ + PINMUX_CFG_REG_VAR("PORT" nr "CR", reg, 8, GROUP(-2, 2, -1, 3), \ GROUP( \ /* PULMD[1:0], handled by .set_bias() */ \ - 0, 0, 0, 0, \ /* IE and OE */ \ 0, PORT##nr##_OUT, PORT##nr##_IN, 0, \ /* SEC, not supported */ \ - 0, 0, \ /* PTMD[2:0] */ \ PORT##nr##_FN0, PORT##nr##_FN1, \ PORT##nr##_FN2, PORT##nr##_FN3, \ |