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authorDavid Brown <davidb@codeaurora.org>2012-09-07 23:45:03 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-09-11 01:33:36 +0200
commit7b6031a7bcf3b191cf02caa2be6939df9266db40 (patch)
treeeceada4f053dbeac2a87be445ff9bd56b0b0e2be /drivers
parentserial: pl011: delete reset callback (diff)
downloadlinux-7b6031a7bcf3b191cf02caa2be6939df9266db40.tar.xz
linux-7b6031a7bcf3b191cf02caa2be6939df9266db40.zip
msm_serial: fix clock rate on DMA-based uarts
The driver explicitly requests a clock rate for the UART, but it is off by a factor of four from the dividers that it programs into the UART. Fix this by setting the rate to 1/4 of the current value. Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/tty/serial/msm_serial.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c
index 8131e2c28015..033e0bc9ebab 100644
--- a/drivers/tty/serial/msm_serial.c
+++ b/drivers/tty/serial/msm_serial.c
@@ -896,7 +896,7 @@ static int __init msm_serial_probe(struct platform_device *pdev)
return PTR_ERR(msm_port->clk);
if (msm_port->is_uartdm)
- clk_set_rate(msm_port->clk, 7372800);
+ clk_set_rate(msm_port->clk, 1843200);
port->uartclk = clk_get_rate(msm_port->clk);
printk(KERN_INFO "uartclk = %d\n", port->uartclk);