diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-12-23 15:41:11 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-02-22 09:55:56 +0100 |
| commit | 9e04a0eda84fccab0ac22a33825ad53f47c968c7 (patch) | |
| tree | eb708ca4d77be9155e28de461ac40975542be066 /drivers | |
| parent | pinctrl: renesas: r8a7794: Add range checking to .pin_to_pocctrl() (diff) | |
| download | linux-9e04a0eda84fccab0ac22a33825ad53f47c968c7.tar.xz linux-9e04a0eda84fccab0ac22a33825ad53f47c968c7.zip | |
pinctrl: renesas: r8a77470: Reduce size for narrow VIN1 channel
The second video-in channel on RZ/G1C has only 12 data lanes, but the
pin control driver uses the vin_data union, which is meant for 24 data
lanes, thus wasting space.
Fix this by using the vin_data12 union instead.
This reduces kernel size by 96 bytes.
Fixes: 50f3f2d73e3426ba ("pinctrl: sh-pfc: Reduce kernel size for narrow VIN channels")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/52716fa89139f6f92592633edb52804d4c5e18f0.1640269757.git.geert+renesas@glider.be
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/pinctrl/renesas/pfc-r8a77470.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/pinctrl/renesas/pfc-r8a77470.c b/drivers/pinctrl/renesas/pfc-r8a77470.c index e6e5487691c1..cf7153d06a95 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77470.c +++ b/drivers/pinctrl/renesas/pfc-r8a77470.c @@ -2140,7 +2140,7 @@ static const unsigned int vin0_clk_mux[] = { VI0_CLK_MARK, }; /* - VIN1 ------------------------------------------------------------------- */ -static const union vin_data vin1_data_pins = { +static const union vin_data12 vin1_data_pins = { .data12 = { RCAR_GP_PIN(3, 1), RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3), RCAR_GP_PIN(3, 4), @@ -2150,7 +2150,7 @@ static const union vin_data vin1_data_pins = { RCAR_GP_PIN(3, 15), RCAR_GP_PIN(3, 16), }, }; -static const union vin_data vin1_data_mux = { +static const union vin_data12 vin1_data_mux = { .data12 = { VI1_DATA0_MARK, VI1_DATA1_MARK, VI1_DATA2_MARK, VI1_DATA3_MARK, |