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author | Fabio Estevam <festevam@gmail.com> | 2019-11-19 20:28:48 +0100 |
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committer | Shawn Guo <shawnguo@kernel.org> | 2019-12-09 03:31:18 +0100 |
commit | c13f370d492d2696f768152d50fc4f7c02a24c83 (patch) | |
tree | 109ca1a67d9044e1961ac6079d88d6040cd56773 /drivers | |
parent | clk: imx6q: disable non functional divider (diff) | |
download | linux-c13f370d492d2696f768152d50fc4f7c02a24c83.tar.xz linux-c13f370d492d2696f768152d50fc4f7c02a24c83.zip |
clk: imx7ulp: Fix watchdog2 clock name typo
There is a typo in the watchdog2 clock name.
Fix it by changing it to "wdg2".
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/clk/imx/clk-imx7ulp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/imx/clk-imx7ulp.c b/drivers/clk/imx/clk-imx7ulp.c index 3fdf3d494f0a..3d9673cb1270 100644 --- a/drivers/clk/imx/clk-imx7ulp.c +++ b/drivers/clk/imx/clk-imx7ulp.c @@ -181,7 +181,7 @@ static void __init imx7ulp_clk_pcc2_init(struct device_node *np) clks[IMX7ULP_CLK_USDHC0] = imx7ulp_clk_composite("usdhc0", periph_plat_sels, ARRAY_SIZE(periph_plat_sels), true, true, true, base + 0xdc); clks[IMX7ULP_CLK_USDHC1] = imx7ulp_clk_composite("usdhc1", periph_plat_sels, ARRAY_SIZE(periph_plat_sels), true, true, true, base + 0xe0); clks[IMX7ULP_CLK_WDG1] = imx7ulp_clk_composite("wdg1", periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, true, true, base + 0xf4); - clks[IMX7ULP_CLK_WDG2] = imx7ulp_clk_composite("sdg2", periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, true, true, base + 0x10c); + clks[IMX7ULP_CLK_WDG2] = imx7ulp_clk_composite("wdg2", periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, true, true, base + 0x10c); imx_check_clk_hws(clks, clk_data->num); |