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author | Konrad Dybcio <konrad.dybcio@linaro.org> | 2023-06-16 01:21:01 +0200 |
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committer | Rob Clark <robdclark@chromium.org> | 2023-06-18 20:35:27 +0200 |
commit | cd036d542afb82adfbbd43c5dbeb7010e8e91ee7 (patch) | |
tree | 4dfa15bbaebdff66a939faaebfd28ed5d145dd29 /fs/locks.c | |
parent | drm/msm/a6xx: Add A619_holi speedbin support (diff) | |
download | linux-cd036d542afb82adfbbd43c5dbeb7010e8e91ee7.tar.xz linux-cd036d542afb82adfbbd43c5dbeb7010e8e91ee7.zip |
drm/msm/a6xx: Add A610 speedbin support
A610 is implemented on at least three SoCs: SM6115 (bengal), SM6125
(trinket) and SM6225 (khaje). Trinket does not support speed binning
(only a single SKU exists) and we don't yet support khaje upstream.
Hence, add a fuse mapping table for bengal to allow for per-chip
frequency limiting.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/542780/
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'fs/locks.c')
0 files changed, 0 insertions, 0 deletions