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authorDmitry Torokhov <dtor@insightbb.com>2007-02-10 07:26:32 +0100
committerDmitry Torokhov <dtor@insightbb.com>2007-02-10 07:26:32 +0100
commitb22364c8eec89e6b0c081a237f3b6348df87796f (patch)
tree233a923281fb640106465d076997ff511efb6edf /include/asm-arm/arch-ixp23xx/memory.h
parentInput: ads7846 - be more compatible with the hwmon framework (diff)
parentlibata: kill ATA_ENABLE_PATA (diff)
downloadlinux-b22364c8eec89e6b0c081a237f3b6348df87796f.tar.xz
linux-b22364c8eec89e6b0c081a237f3b6348df87796f.zip
Merge rsync://rsync.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'include/asm-arm/arch-ixp23xx/memory.h')
-rw-r--r--include/asm-arm/arch-ixp23xx/memory.h16
1 files changed, 1 insertions, 15 deletions
diff --git a/include/asm-arm/arch-ixp23xx/memory.h b/include/asm-arm/arch-ixp23xx/memory.h
index c85fc06a043c..6d859d742d7f 100644
--- a/include/asm-arm/arch-ixp23xx/memory.h
+++ b/include/asm-arm/arch-ixp23xx/memory.h
@@ -41,21 +41,7 @@
data = *((volatile int *)IXP23XX_PCI_SDRAM_BAR); \
__phys_to_virt((((b - (data & 0xfffffff0)) + 0x00000000))); })
-/*
- * Coherency support. Only supported on A2 CPUs or on A1
- * systems that have the cache coherency workaround.
- */
-static inline int __ixp23xx_arch_is_coherent(void)
-{
- extern unsigned int processor_id;
-
- if (((processor_id & 15) >= 4) || machine_is_roadrunner())
- return 1;
-
- return 0;
-}
-
-#define arch_is_coherent() __ixp23xx_arch_is_coherent()
+#define arch_is_coherent() 1
#endif