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authorIngo Molnar <mingo@elte.hu>2008-07-18 21:13:20 +0200
committerIngo Molnar <mingo@elte.hu>2008-07-18 21:13:20 +0200
commitf6dc8ccaab6d8f63cbae1e6c73fe972b26f5376c (patch)
treec5643fcdc884a8d0bfc3f1bc28039cab7394e5bc /include/asm-powerpc/ptrace.h
parentx86: use generic per-device dma coherent allocator (diff)
parentMerge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/gi... (diff)
downloadlinux-f6dc8ccaab6d8f63cbae1e6c73fe972b26f5376c.tar.xz
linux-f6dc8ccaab6d8f63cbae1e6c73fe972b26f5376c.zip
Merge branch 'linus' into core/generic-dma-coherent
Conflicts: kernel/Makefile Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-powerpc/ptrace.h')
-rw-r--r--include/asm-powerpc/ptrace.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/include/asm-powerpc/ptrace.h b/include/asm-powerpc/ptrace.h
index 39023dde1cc4..3d6e31024e56 100644
--- a/include/asm-powerpc/ptrace.h
+++ b/include/asm-powerpc/ptrace.h
@@ -119,6 +119,7 @@ extern int ptrace_put_reg(struct task_struct *task, int regno,
#ifndef __powerpc64__
#define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) != 0)
#define IS_MCHECK_EXC(regs) (((regs)->trap & 4) != 0)
+#define IS_DEBUG_EXC(regs) (((regs)->trap & 8) != 0)
#endif /* ! __powerpc64__ */
#define TRAP(regs) ((regs)->trap & ~0xF)
#ifdef __powerpc64__
@@ -223,6 +224,14 @@ extern void user_disable_single_step(struct task_struct *);
#define PT_VRSAVE_32 (PT_VR0 + 33*4)
#endif
+/*
+ * Only store first 32 VSRs here. The second 32 VSRs in VR0-31
+ */
+#define PT_VSR0 150 /* each VSR reg occupies 2 slots in 64-bit */
+#define PT_VSR31 (PT_VSR0 + 2*31)
+#ifdef __KERNEL__
+#define PT_VSR0_32 300 /* each VSR reg occupies 4 slots in 32-bit */
+#endif
#endif /* __powerpc64__ */
/*
@@ -245,6 +254,10 @@ extern void user_disable_single_step(struct task_struct *);
#define PTRACE_GETEVRREGS 20
#define PTRACE_SETEVRREGS 21
+/* Get the first 32 128bit VSX registers */
+#define PTRACE_GETVSRREGS 27
+#define PTRACE_SETVSRREGS 28
+
/*
* Get or set a debug register. The first 16 are DABR registers and the
* second 16 are IABR registers.