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| author | yong.liang <yong.liang@mediatek.com> | 2020-01-15 09:58:25 +0100 |
|---|---|---|
| committer | Wim Van Sebroeck <wim@linux-watchdog.org> | 2020-01-27 15:55:48 +0100 |
| commit | f43f97a0fc0e568a6f68480b043e8f7fdfa8fb23 (patch) | |
| tree | 1a707ba2ccfc666f0a1494901a0f23befdc6ddde /include/dt-bindings/reset-controller | |
| parent | dt-bindings: watchdog: da9062: add suspend disable option (diff) | |
| download | linux-f43f97a0fc0e568a6f68480b043e8f7fdfa8fb23.tar.xz linux-f43f97a0fc0e568a6f68480b043e8f7fdfa8fb23.zip | |
dt-bindings: mediatek: mt8183: Add #reset-cells
Add #reset-cells property and update example
Signed-off-by: yong.liang <yong.liang@mediatek.com>
Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com>
Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <groeck7@gmail.com>
Link: https://lore.kernel.org/r/20200115085828.27791-2-yong.liang@mediatek.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Diffstat (limited to 'include/dt-bindings/reset-controller')
| -rw-r--r-- | include/dt-bindings/reset-controller/mt8183-resets.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/include/dt-bindings/reset-controller/mt8183-resets.h b/include/dt-bindings/reset-controller/mt8183-resets.h index 8804e34ebdd4..a1bbd41e0d12 100644 --- a/include/dt-bindings/reset-controller/mt8183-resets.h +++ b/include/dt-bindings/reset-controller/mt8183-resets.h @@ -78,4 +78,21 @@ #define MT8183_INFRACFG_AO_I2C7_SW_RST 126 #define MT8183_INFRACFG_AO_I2C8_SW_RST 127 +#define MT8183_INFRACFG_SW_RST_NUM 128 + +#define MT8183_TOPRGU_MM_SW_RST 1 +#define MT8183_TOPRGU_MFG_SW_RST 2 +#define MT8183_TOPRGU_VENC_SW_RST 3 +#define MT8183_TOPRGU_VDEC_SW_RST 4 +#define MT8183_TOPRGU_IMG_SW_RST 5 +#define MT8183_TOPRGU_MD_SW_RST 7 +#define MT8183_TOPRGU_CONN_SW_RST 9 +#define MT8183_TOPRGU_CONN_MCU_SW_RST 12 +#define MT8183_TOPRGU_IPU0_SW_RST 14 +#define MT8183_TOPRGU_IPU1_SW_RST 15 +#define MT8183_TOPRGU_AUDIO_SW_RST 17 +#define MT8183_TOPRGU_CAMSYS_SW_RST 18 + +#define MT8183_TOPRGU_SW_RST_NUM 19 + #endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8183 */ |