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authorVamsi Attunuru <vattunuru@marvell.com>2024-07-06 17:30:09 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2024-07-10 14:58:29 +0200
commit5f67eef6dff39421215e9134f1eaae51b67a73b7 (patch)
tree6e1aeb758c027df963a38f512c6744c874ebda46 /include/uapi/misc
parentmisc: keba: Fix missing AUXILIARY_BUS dependency (diff)
downloadlinux-5f67eef6dff39421215e9134f1eaae51b67a73b7.tar.xz
linux-5f67eef6dff39421215e9134f1eaae51b67a73b7.zip
misc: mrvl-cn10k-dpi: add Octeon CN10K DPI administrative driver
Adds a misc driver for Marvell CN10K DPI(DMA Engine) device's physical function which initializes DPI DMA hardware's global configuration and enables hardware mailbox channels between physical function (PF) and it's virtual functions (VF). VF device drivers (User space drivers) use this hw mailbox to communicate any required device configuration on it's respective VF device. Accordingly, this DPI PF driver provisions the VF device resources. At the hardware level, the DPI physical function (PF) acts as a management interface to setup the VF device resources, VF devices are only provisioned to handle or control the actual DMA Engine's data transfer capabilities. Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com> Reviewed-by: Srujana Challa <schalla@marvell.com> Link: https://lore.kernel.org/r/20240706153009.3775333-1-vattunuru@marvell.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include/uapi/misc')
-rw-r--r--include/uapi/misc/mrvl_cn10k_dpi.h39
1 files changed, 39 insertions, 0 deletions
diff --git a/include/uapi/misc/mrvl_cn10k_dpi.h b/include/uapi/misc/mrvl_cn10k_dpi.h
new file mode 100644
index 000000000000..8db902eaa907
--- /dev/null
+++ b/include/uapi/misc/mrvl_cn10k_dpi.h
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+/*
+ * Marvell Octeon CN10K DPI driver
+ *
+ * Copyright (C) 2024 Marvell.
+ *
+ */
+
+#ifndef __MRVL_CN10K_DPI_H__
+#define __MRVL_CN10K_DPI_H__
+
+#include <linux/types.h>
+
+#define DPI_MAX_ENGINES 6
+
+struct dpi_mps_mrrs_cfg {
+ __u16 max_read_req_sz; /* Max read request size */
+ __u16 max_payload_sz; /* Max payload size */
+ __u16 port; /* Ebus port */
+ __u16 reserved; /* Reserved */
+};
+
+struct dpi_engine_cfg {
+ __u64 fifo_mask; /* FIFO size mask in KBytes */
+ __u16 molr[DPI_MAX_ENGINES]; /* Max outstanding load requests */
+ __u16 update_molr; /* '1' to update engine MOLR */
+ __u16 reserved; /* Reserved */
+};
+
+/* DPI ioctl numbers */
+#define DPI_MAGIC_NUM 0xB8
+
+/* Set MPS & MRRS parameters */
+#define DPI_MPS_MRRS_CFG _IOW(DPI_MAGIC_NUM, 1, struct dpi_mps_mrrs_cfg)
+
+/* Set Engine FIFO configuration */
+#define DPI_ENGINE_CFG _IOW(DPI_MAGIC_NUM, 2, struct dpi_engine_cfg)
+
+#endif /* __MRVL_CN10K_DPI_H__ */