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authorZhangfei Gao <zhangfei.gao@linaro.org>2014-01-13 10:37:32 +0100
committerMike Turquette <mturquette@linaro.org>2014-02-27 01:03:56 +0100
commit62ac983b614149db5a98f333dbb13848cb6b7524 (patch)
tree06ded7680f6a8a2862460ca8db8005469c9a65d9 /include
parentclk: socfpga: Support multiple parents for the pll clocks (diff)
downloadlinux-62ac983b614149db5a98f333dbb13848cb6b7524.tar.xz
linux-62ac983b614149db5a98f333dbb13848cb6b7524.zip
clk: hisilicon: add hi3620_mmc_clks
Suggest by Arnd: abstract mmc tuning as clock behavior, also because different soc have different tuning method and registers. hi3620_mmc_clks is added to handle mmc clock specifically on hi3620. Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/dt-bindings/clock/hi3620-clock.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/hi3620-clock.h b/include/dt-bindings/clock/hi3620-clock.h
index 6eaa6a45e110..21b9d0e2eb0c 100644
--- a/include/dt-bindings/clock/hi3620-clock.h
+++ b/include/dt-bindings/clock/hi3620-clock.h
@@ -147,6 +147,11 @@
#define HI3620_MMC_CLK3 217
#define HI3620_MCU_CLK 218
+#define HI3620_SD_CIUCLK 0
+#define HI3620_MMC_CIUCLK1 1
+#define HI3620_MMC_CIUCLK2 2
+#define HI3620_MMC_CIUCLK3 3
+
#define HI3620_NR_CLKS 219
#endif /* __DTS_HI3620_CLOCK_H */