diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2006-02-23 15:10:53 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2006-02-27 18:30:36 +0100 |
| commit | 92f22c183cd669c8575767fede8fe43bb4f7bce9 (patch) | |
| tree | df4aae80db1218a8fab613689e99acf96f18f417 /include | |
| parent | [MIPS] SMP: Fix initialization order bug. (diff) | |
| download | linux-92f22c183cd669c8575767fede8fe43bb4f7bce9.tar.xz linux-92f22c183cd669c8575767fede8fe43bb4f7bce9.zip | |
[MIPS] Fix atomic*_sub_if_positive return value.
Reported and initial fix by Thomas Koeller <thomas.koeller@baslerweb.com>,
rewritten by me.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-mips/atomic.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h index 654b97d3e13a..2c8b853376c9 100644 --- a/include/asm-mips/atomic.h +++ b/include/asm-mips/atomic.h @@ -250,7 +250,10 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) " subu %0, %1, %3 \n" " bltz %0, 1f \n" " sc %0, %2 \n" + " .set noreorder \n" " beqzl %0, 1b \n" + " subu %0, %1, %3 \n" + " .set reorder \n" " sync \n" "1: \n" " .set mips0 \n" @@ -266,7 +269,10 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) " subu %0, %1, %3 \n" " bltz %0, 1f \n" " sc %0, %2 \n" + " .set noreorder \n" " beqz %0, 1b \n" + " subu %0, %1, %3 \n" + " .set reorder \n" " sync \n" "1: \n" " .set mips0 \n" @@ -598,7 +604,10 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) " dsubu %0, %1, %3 \n" " bltz %0, 1f \n" " scd %0, %2 \n" + " .set noreorder \n" " beqzl %0, 1b \n" + " dsubu %0, %1, %3 \n" + " .set reorder \n" " sync \n" "1: \n" " .set mips0 \n" @@ -614,7 +623,10 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) " dsubu %0, %1, %3 \n" " bltz %0, 1f \n" " scd %0, %2 \n" + " .set noreorder \n" " beqz %0, 1b \n" + " dsubu %0, %1, %3 \n" + " .set reorder \n" " sync \n" "1: \n" " .set mips0 \n" |