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| author | Thomas Gleixner <tglx@linutronix.de> | 2020-10-24 23:35:20 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2020-10-28 20:26:27 +0100 |
| commit | 341b4a7211b6ba3a7089e1dc09ac4bd576dfb05f (patch) | |
| tree | b426a1bb19d527d4ea4da146a4d38789507a2d65 /kernel/sched/sched.h | |
| parent | x86/io_apic: Cleanup trigger/polarity helpers (diff) | |
| download | linux-341b4a7211b6ba3a7089e1dc09ac4bd576dfb05f.tar.xz linux-341b4a7211b6ba3a7089e1dc09ac4bd576dfb05f.zip | |
x86/ioapic: Cleanup IO/APIC route entry structs
Having two seperate structs for the I/O-APIC RTE entries (non-remapped and
DMAR remapped) requires type casts and makes it hard to map.
Combine them in IO_APIC_routing_entry by defining a union of two 64bit
bitfields. Use naming which reflects which bits are shared and which bits
are actually different for the operating modes.
[dwmw2: Fix it up and finish the job, pulling the 32-bit w1,w2 words for
register access into the same union and eliminating a few more
places where bits were accessed through masks and shifts.]
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20201024213535.443185-21-dwmw2@infradead.org
Diffstat (limited to 'kernel/sched/sched.h')
0 files changed, 0 insertions, 0 deletions