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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2021-01-11 17:37:02 +0100 |
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committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2021-01-29 17:51:01 +0100 |
commit | cb807055497c39bd657da9288ebdf07b81fc8d69 (patch) | |
tree | 644a78d0a2668df9c643135cbed8e467e55174e8 /mm/memtest.c | |
parent | drm/i915: Rename is_16gb_dimm to wm_lv_0_adjust_needed (diff) | |
download | linux-cb807055497c39bd657da9288ebdf07b81fc8d69.tar.xz linux-cb807055497c39bd657da9288ebdf07b81fc8d69.zip |
drm/i915: Limit plane stride to below TILEOFF.x limit
Limit pre-skl plane stride to below 4k or 8k pixels (depending on
the platform). We do this in order guarantee that TILEOFF/OFFSET.x
does not get too big.
Currently this is not a problem as we align SURF to 4k, and so
TILEOFF/OFFSET only have to deal with a single tile's worth of
pixels. But for async flips we're going to have to bump SURF
alignment to 256k, and thus we can no longer guarantee
TILEOFF/OFFSET.x will stay within acceptable bounds. We can avoid
this by borrowing a trick from the skl+ code and limit the max
plane stride to whatever value we can fit into TILEOFF/OFFSET.x.
The slight downside is that we may end up doing GTT remapping in
a few more cases where previously we did not have to. But since
that will only happen with huge buffers I'm not really concerned
about it.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210111163711.12913-3-ville.syrjala@linux.intel.com
Reviewed-by: Karthik B S <karthik.b.s@intel.com>
Diffstat (limited to 'mm/memtest.c')
0 files changed, 0 insertions, 0 deletions