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authorSowjanya Komatineni <skomatineni@nvidia.com>2019-04-05 02:14:07 +0200
committerMark Brown <broonie@kernel.org>2019-04-08 09:11:58 +0200
commit9877a347f2056f7aa4e770de9a20048ad288f545 (patch)
tree21fa94a1c427ca3c95a0557b0af928301bbbf665 /mm/percpu-vm.c
parentspi: gpio: Use devm_spi_register_master() (diff)
downloadlinux-9877a347f2056f7aa4e770de9a20048ad288f545.tar.xz
linux-9877a347f2056f7aa4e770de9a20048ad288f545.zip
spi: tegra114: add dual mode support
This patch adds support for dual mode SPI transfer. Dual mode uses both MOSI and MISO lines in parallel where the data is interleaved on MOSI and MISO lines increasing the throughput. Packet from Tx FIFO is transmitted on both MOSI and MISO lines and packet to Rx FIFO is received from both MOSI and MISO lines. Even bits are transmitted or received on the MOSI data line and odd bits are transmitted or received on the MISO data line. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'mm/percpu-vm.c')
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