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authorJames Morse <james.morse@arm.com>2019-06-18 17:17:36 +0200
committerMarc Zyngier <marc.zyngier@arm.com>2019-07-05 14:03:29 +0200
commit0e5b9c085dcef61163f3f277964c1a1623043f67 (patch)
tree703a97a9a895dd5829f89ef5fbb5872ae8e690b0 /samples
parentKVM: arm64: Make indirect vectors preamble behaviour symmetric (diff)
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KVM: arm64: Consume pending SError as early as possible
On systems with v8.2 we switch the 'vaxorcism' of guest SError with an alternative sequence that uses the ESB-instruction, then reads DISR_EL1. This saves the unmasking and remasking of asynchronous exceptions. We do this after we've saved the guest registers and restored the host's. Any SError that becomes pending due to this will be accounted to the guest, when it actually occurred during host-execution. Move the ESB-instruction as early as possible. Any guest SError will become pending due to this ESB-instruction and then consumed to DISR_EL1 before the host touches anything. This lets us account for host/guest SError precisely on the guest exit exception boundary. Because the ESB-instruction now lands in the preamble section of the vectors, we need to add it to the unpatched indirect vectors too, and to any sequence that may be patched in over the top. The ESB-instruction always lives in the head of the vectors, to be before any memory write. Whereas the register-store always lives in the tail. Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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